Applied Materials, Inc.

Dong Hyung Lee

Kwangduk Douglas Lee

Sarah Michelle Bobek

Majeed Foad

Prashant Kumar Kulshreshtha

Rajesh Prasad

Harry S Whitesell

Hidetaka Oshio

Deven Matthew Raj Mittal

Kartik Ramaswamy

Tuan Anh Nguyen

Hua Chung

Ganesh Balasubramanian

Shijian Li

Amit Kumar Bansal

Karthik Janakiraman

Abdul Aziz Khaja

Lori D Washington

Biagio Gallo

Toan Q Tran

Peter I Porshnev

Sandeep Nijhawan

Olga Kryliouk

Won B Bang

Yen-Kun Victor Wang

Manoj Vellaikal

Tze Wing Poon

Sungwon Ha

Ratsamee Limdulpaiboon

Jie Su

Anjana M Patel

Sang Won Kang

Venkataramana R Chavva

Scott Falk

Jang Seok Oh

Jacob Grayson

Dongwon Choi

Ruiyun Huang

Daniel S Herkalo

Jin Ho Lee

Exemplary methods of treating a chamber may include delivering a cleaning precursor to a remote plasma unit. The methods may include forming a plasma of the cleaning precursor. The methods may include delivering plasma effluents of the cleaning precursor to a processing region of a semiconductor processing chamber. The processing region may be defined by one or more chamber components. The one or more chamber components may include an oxide coating. The methods may include halting delivery of the plasma effluents. The methods may include treating the oxide coating with a hydrogen-containing material delivered to the processing region subsequent halting delivery of the plasma effluents.

Treatment for high-temperature cleans

Methods and techniques for deposition of amorphous carbon films on a substrate are provided. In one example, the method includes depositing an amorphous carbon film on an underlayer positioned on a susceptor in a first processing region. The method further includes implanting a dopant or the inert species into the amorphous carbon film in a second processing region. The implant species, energy, dose & temperature in some combination may be used to enhance the hardmask hardness. The method further includes patterning the doped amorphous carbon film. The method further includes etching the underlayer.

Highly etch selective amorphous carbon film

Implementations described herein generally relate to the fabrication of integrated circuits. More particularly, the implementations described herein provide techniques for deposition of amorphous carbon films on a substrate. In one implementation, a method of forming an amorphous carbon film is provided. The method comprises depositing an amorphous carbon film on an underlayer positioned on a susceptor in a first processing region. The method further comprises implanting a dopant or inert species into the amorphous carbon film in a second processing region. The dopant or inert species is selected from carbon, boron, nitrogen, silicon, phosphorous, argon, helium, neon, krypton, xenon or combinations thereof. The method further comprises patterning the doped amorphous carbon film. The method further comprises etching the underlayer.

A method and apparatus for removing deposition products from internal surfaces of a processing chamber, and for preventing or slowing growth of such deposition products. A halogen containing gas is provided to the chamber to etch away deposition products. A halogen scavenging gas is provided to the chamber to remove any residual halogen. The halogen scavenging gas is generally activated by exposure to electromagnetic energy, either inside the processing chamber by thermal energy, or in a remote chamber by electric field, UV, or microwave. A deposition precursor may be added to the halogen scavenging gas to form a deposition resistant film on the internal surfaces of the chamber. Additionally, or alternately, a deposition resistant film may be formed by sputtering a deposition resistant metal onto internal components of the processing chamber in a PVD process.

Method of decontamination of process chamber after in-situ chamber clean

Methods and apparatus for processing a substrate are provided herein. In some embodiments, an apparatus for substrate processing includes a process chamber having a chamber body defining an inner volume; and a silicon containing coating disposed on an interior surface of the chamber body, wherein an outer surface of the silicon containing coating is at least 35 percent silicon (Si) by atom. In some embodiments, a method for forming a silicon containing coating in a process chamber includes providing a first process gas comprising a silicon containing gas to an inner volume of the process chamber; and forming a silicon containing coating on an interior surface of the process chamber, wherein an outer surface of the silicon containing coating is at least 35 percent silicon.

Enhanced scavenging of residual fluorine radicals using silicon coating on process chamber walls

Methods for implanting ions into a substrate by a plasma immersion ion implanting process are provided. In one embodiment, the method for implanting ions into a substrate by a plasma immersion ion implantation process includes providing a substrate into a processing chamber, supplying a gas mixture including a reacting gas and a reducing gas into the chamber, and implanting ions from the gas mixture into the substrate. In another embodiment, the method includes providing a substrate into a processing chamber, supplying a gas mixture including reacting gas and a hydrogen containing reducing gas into the chamber, and implanting ions from the gas mixture into the substrate.

Plasma immersed ion implantation process

Embodiments of the present invention provide an apparatus for constraining and supporting the lift pins to prevent or minimize lateral movement of the lift pins that causes substrate hand-off problems and associated degradation in substrate processing characteristics and results. In one embodiment, a lift pin assembly for manipulating a substrate above a support surface of a substrate support comprises a plurality of lift pins movable between an up position and a down position. The lift pins include top ends and bottom ends. The top ends are configured to be lifted above the support surface of the substrate support to contact a bottom surface of the substrate in the up position. The top ends are configured to be positioned at or below the support surface of the substrate support in the down position. A lift pin connecting member is attached to the plurality of lift pins at attachment locations at or near the bottom ends of the lift pins to maintain fixed relative distances between the lift pins at the attachment locations and to move with the lift pins between the up position and the down position.

Lift pin assembly for substrate processing

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Kyunggi, South Korea

Dong Hyung Lee