Advanced Micro Devices Corporation

Ati Technologies Ulc

Donald A Clay

Russell J Schreiber

Omid Rowhani

Ioan Cordos

Aaron Keiichi Horiuchi

Te-Hsuan Chen

William Edwin Laub, Jr

Stephen J Dussinger

Kerry Hamel

Michael Edward Griffith

Hye Jung Stanford

Ruochen Xie

Kathryn E Wilcox

A system and method for efficiently designing a through silicon via (TSV) macro blocks are described. In various implementations, the circuitry of a processor executes instructions of a place and route tool that provides automatic placement of macro blocks and standard cells on an integrated circuit die based on a copy of a netlist of the integrated circuit being designed and a copy of a standard cell library that includes a variety of standard cells and macro blocks. The processor places two functional macros in the floorplan with a channel between them. In the channel, the processor places a TSV macro that includes at least one boundary cell inside of the TSV macro. The processor prevents placement of a boundary cell adjacent to at least one side of the TSV macro despite empty space exists due to no standard cells or macros about the at least one side.

Through silicon via macro with dense layout for placement in an integrated circuit floorplan

A computer-implemented method of fabricating an integrated circuit structure includes selecting a first cell from a standard cell library, the first cell having a cell boundary and comprising a metal segment at a first metal track at a metal layer, the metal segment extending along a direction and terminating a specified distance beyond a first edge of the cell boundary. The method further includes placing the first cell at a first location of a physical layout for the integrated circuit structure. The method also includes selecting a second cell from the standard cell library and placing the second cell at a second location of the physical layout such that a second edge of a cell boundary of the second cell abuts the first edge of the cell boundary of the first cell, and wherein the metal segment extends into a metal track at the metal layer of the second cell.

Integrated circuit implementing standard cells with metal layer segments extending out of cell boundary

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Boxborough, MA, United States of America

Donald A Clay