Taiwan Semiconductor Manufacturing Comp. Ltd.

Ding-Chung Lu

Wen-Chih Chiou

Shang-Yun Hou

Cheng-Yuan Tsai

Ching-Wen Hsiao

Han-Ping Pu

Chao-Hsiung Wang

Chen-Cheng Kuo

Kai-Ming Ching

Bai-Yao Lou

Dean Wang

A method for packaging a semiconductor device disclosed. A substrate comprising a plurality of dies, separated by scribe line areas respectively is provided, wherein at least one layer is overlying the substrate. A portion of the layer within the scribe lines area is removed by photolithography and etching to form openings. The substrate is sawed along the scribe line areas, passing the openings. In alternative embodiment, a first substrate comprising a plurality of first dies separated by first scribe line areas respectively is provided, wherein at least one first structural layer is overlying the first substrate. The first structural layer is patterned to form first openings within the first scribe line areas. A second substrate comprising a plurality of second dies separated by second scribe line areas respectively is provided, wherein at least one second structural layer is overlying the substrate. The second structural layer is patterned to form second openings within the second scribe line areas. The first substrate and the second substrate are bonded to form a stack structure. The stack structure is cut along the first and second scribe line areas, passing the first and second openings.

Semiconductor device and fabrication methods thereof

Interconnect structures with polygonal cell structures. An exemplary interconnect structure comprises a substrate and a first dielectric layer, overlying the substrate and exposing a conductive feature formed therethrough and connected with the substrate, wherein the first dielectric layer includes a plurality of polygon cell structures with hollow interior.

Interconnect structure with polygon cell structures

Growing community of inventors

Hsinchu, Taiwan

Ding-Chung Lu