Micron Electronics, Inc.

Micron Technology Incorporated

Themis Computer

Themis Corporation

Dennis Henry Smith

Carlton Gene Amdahl

Michael G Henderson

Don A Agneta

Stephen E J Papa

Don Schiro

William E Kehret

Walter August Wallach

Don Shiro

A modular electronic component includes a circuit board having disposed thereon one or more electronic components and an enclosure for housing the circuit board. The enclosure comprises a thermally conductive shell having front and back surfaces being substantially parallel to the plane of the circuit board and being disposed on opposite sides of the circuit board from each other, left and right surfaces being substantially perpendicular to the plane of the circuit board and being disposed on opposite sides of the circuit board from each other, and top and bottom surfaces being substantially perpendicular to the left and right surfaces and substantially perpendicular to the top and bottom surfaces and being disposed on opposite sides of the circuit board from each other. A thermal shunt comprised of a thermally conductive material is disposed between the circuit board and the front surface of the enclosure and provides a thermally conductive path between at least some of the electronic components and the front surface of the enclosure, where the front surface of the enclosure conducts heat to at least one of the top, left, and right surfaces of the enclosure.

Printed circuit board module enclosure and apparatus using same

A method of electrically coupling a central processing unit (CPU) of a network server to a plurality of network interface modules. The method comprises providing each of the plurality of network interface modules with a respective bus adapter chip to route an I/O bus having a first format from the central processing unit to a primary side of each of the plurality of bus adaptor chips and routing another I/O bus of the first format from a secondary side of each of the plurality of bus adapter chips to respective ones of the network interface modules. The bus adapter chips also provide for arbitered access along the I/O buses and isolation of the CPU from electrical disruption when one the network interface modules is removed.

Method of providing an interface to a plurality of peripheral devices using bus adapter chips

The present invention relates to a ruggedized enclosure for housing and protecting electronic circuits. The enclosure utilizes a top compartment for housing the circuit and a cooling assembly rigidly coupled to the top compartment. The cooling assembly utilizes a passive radiator to for a rigid truss plate structure. The truss plate structure rigidifies the enclosure helping to protect the enclosure and circuit from destructive shock events and destructive vibration events. The cooling assembly further provides an efficient heat exchange for removing heat from the electronic circuit. A method for protecting an electronic circuit utilizing a rigid truss plate structure is also provided.

Ruggedized electronics enclosure

The present invention relates to a ruggedized enclosure for housing and protecting electronics circuits. The enclosure utilizes a top compartment for housing the circuit and a cooling assembly rigidly coupled to the top compartment. The cooling assembly utilizes a passive radiator to form a rigid truss plate structure. The truss plate structure rigidifies the enclosure helping to protect the enclosure and circuit from destructive shock events and destructive vibration events. The cooling assembly further provides an efficient heat exchange for removing heat from the electronic circuit. A method for protecting an electronic circuit utilizing a rigid truss plate structure is also provided.

A method of electrically coupling a central processing unit (CPU) of a network server to a plurality of network interface modules. The method comprises providing each of the plurality of network interface modules with a respective bus adapter chip to route an I/O bus having a first format from the central processing unit to a primary side of each of the plurality of bus adapter chips and routing another I/O bus of the first format from a secondary side of each of the plurality of bus adapter chips to respective ones of the network interface modules. The bus adapter chips also provide for arbitered access along the I/O buses and isolation of the CPU from electrical disruption when one of the network interface modules is removed.

Apparatus and method is disclosed for providing hot-add and hot swap capability to a computer system with a processor, and a memory, connected to a system bus. The apparatus includes a first bus, an adapter card slot, a switchable interface unit and hot-swap hot-add program code means. The first bus is connected to the system bus. The adapter card slot has a first port and a second port. The switchable interface unit includes a primary port and a secondary port. The primary port is connected to the first bus and the secondary port is connected to the first port of the adapter card slot. The switchable interface unit is responsive to a hot-swap hot-add power-down request to disconnect the second port from the first bus. The switchable interface unit is also responsive to a power-up request to reconnect the second port to the first bus. The hot-swap hot-add program code means in the memory accepts a request to connect a peripheral device adapter card into the second port of said adapter card slot, and responsive to the request communicates a power-down request to the switchable interface unit.

Method for computer implemented hot-swap and hot-add

Methods of removing and replacing data processing circuitry are provided comprising removing a network interface module from the computer without powering down the computer and removing an interface card from the network interface module. The further acts of replacing the interface card into the network interface module and replacing the network interface module into the computer without powering down the network computer are also performed in accordance with this method.

Method for hot swapping of network components

A fault-tolerant computer system includes a processor and a memory, connected to a system bus. The system includes at least two mirrored circuits, at least two mirrored IO devices, a detection means and a re-route means. The two mirrored circuits each include an interface to the system bus, and an IO interface. The input/output interface of each of the mirrored circuits is connected to one of the two mirrored IO devices. Detection means detect a load imbalance in the data transfer between the system bus and either one of the two mirrored IO devices. In response to the detection of a load imbalance, the re-route means re-routes the data transfer between the system bus and the other one of the two mirrored IO devices. In another embodiment, a fault-tolerant computer system includes a first, second and third IO bus, legacy devices, and two IO devices. The first IO bus is connected to the system bus. The legacy devices are connected to the first IO bus. The second and third IO buses are each connected to the system bus. The IO devices are each connected to a corresponding one of the second and third IO buses. An other embodiment of the invention can be characterized as an apparatus for transferring data between at least one transport protocol stack and a plurality of network adapters coupled to a computer network that supports recovery from network adapter and a connection failure.

Three bus server architecture with a legacy PCI bus and mirrored I/O PCI buses

A system for expanding the loading capacity of a PCI bus in an information processing system having a multiple bus architecture. In one embodiment, the system comprises a processor-to-PCI bridge connected to a plurality of PCI-to-PCI bridges to generate multiple PCI buses. A plurality of add-in board connectors are coupled to each of the generated PCI buses. In another embodiment, the system comprises two or more processor-to-PCI bridges connected to a plurality of PCI-to-PCI bridges to generate multiple PCI buses. The resulting system expands the loading capacity of a PCI bus while adding resistance to single point failures.

System for expanding PCI bus loading capacity

Apparatus for computer implemented hot-swap and hot-add

A method for expanding the loading capacity of a PCI bus in an information processing system having a multiple bus architecture. In one embodiment, the method comprises connecting a processor-to-PCI bridge to a plurality of PCI-to-PCI bridges to generate multiple PCI buses. A plurality of add-in board connectors are coupled to each of the generated PCI buses. In another embodiment, the method comprises connecting two or more processor-to-PCI bridges to a plurality of PCI-to-PCI bridges to generate multiple PCI buses. The resulting system expands the loading capacity of a PCI bus while adding fault-tolerance and resistance to single point failures.

Method of expanding bus loading capacity

A network server includes removable network interface modules mounted in a chassis. The network interface modules connect to a CPU through an interconnection assembly module. The network interface modules may comprise removable canisters containing a plurality of interface cards.

Fault tolerant computer system

A cooling system for cooling components of a computer is provided. The cooling system includes a DC fan which operates at a speed which is substantially proportional to the voltage that is applied to the fan. A zener diode voltage divider is connected in series between a voltage source and a first input of the fan. The second input of the fan is connected to a reference voltage source. A switch is also connected in series between the voltage source and the first voltage input of the fan so as to be connected in parallel with the zener diode voltage divider. When the switch is in a first position, the voltage produced by the voltage source is applied directly to the fan allowing the fan to operate at a first speed. When the switch is in a second position, the voltage from the voltage source is applied to the first input of the fan through the zener diode such that the first input of the fan receives a second voltage that is less than the first voltage thereby causing the fan to operate at a second speed. The zener diode voltage divider is substantially current independent such that the voltage drop across the zener diode is substantially independent of the current that is drawn by the fan.

Computer fan speed control device

A method of cooling computer components is provided. The method comprises positioning the fan adjacent computer components so that the fan is in a position to blow air over the computer components, connecting the fan to a first voltage source through a zener diode voltage divider, connecting the fan to a first voltage source through a switch, manipulating the switch into a first position wherein a first voltage is applied to the fan thereby inducing the fan to operate at a first speed and manipulating the switch into a second position wherein a second voltage is applied to the fan thereby inducing the fan to operate at a second speed which is less than the first speed.

Growing community of inventors

Fremont, CA, United States of America

Dennis Henry Smith