Average Co-Inventor Count = 14.49
ph-index = 11
The patent ph-index is calculated by counting the number of publications for which an author has been cited by other authors at least that same number of times.
Company Filing History:
1. Pdf Solutions, Incorporated (104 from 203 patents)
104 patents:
1. 12429520 - Systems, devices, and methods for performing a non-contact electrical measurement on a cell, non-contact electrical measurement cell vehicle, chip, wafer, die, or logic block
2. 12038802 - Collaborative learning model for semiconductor applications
3. 12038476 - Systems, devices, and methods for performing a non-contact electrical measurement on a cell, non-contact electrical measurement cell vehicle, chip, wafer, die, or logic block
4. 11668746 - Systems, devices, and methods for performing a non-contact electrical measurement on a cell, non-contact electrical measurement cell vehicle, chip, wafer, die, or logic block
5. 11340293 - Methods for performing a non-contact electrical measurement on a cell, chip, wafer, die, or logic block
6. 11107804 - IC with test structures and e-beam pads embedded within a contiguous standard cell area
7. 11081476 - IC with test structures and e-beam pads embedded within a contiguous standard cell area
8. 11081477 - IC with test structures and e-beam pads embedded within a contiguous standard cell area
9. 11075194 - IC with test structures and E-beam pads embedded within a contiguous standard cell area
10. 11018126 - IC with test structures and e-beam pads embedded within a contiguous standard cell area
11. 10978438 - IC with test structures and E-beam pads embedded within a contiguous standard cell area
12. 10854522 - Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-side short or leakage, at least one corner short or leakage, and at least one via open or resistance, where such measurements are obtained from non-contact pads associated with respective tip-to-side short, corner short, and via open test areas
13. 10777472 - IC with test structures embedded within a contiguous standard cell area
14. 10593604 - Process for making semiconductor dies, chips, and wafers using in-line measurements obtained from DOEs of NCEM-enabled fill cells
15. 10290552 - Methods for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one via-chamfer short or leakage, and at least one corner short or leakage, where such measurements are obtained from cells with respective tip-to-tip short, via-chamfer short, and corner short test areas, using a charged particle-beam inspector with beam deflection to account for motion of the stage