Globalfoundries Inc.

Xilinx, Inc.

Advanced Micro Devices Corporation

Gloablfoundries Inc.

Deepak K Nayak

Srinivasa Banna

Yuhao Luo

Ajey Poovannummoottil Jacob

Ming-Yin Hao

Daniel Gitlin

Rajat Rakkhit

Steven J Bentley

Shuxian Wu

Xin X Wu

Jae-Gyung Ahn

Zoran Krivokapic

Shekhar Pramanick

Donald L Wollesen

Bartlomiej Jan Pawlak

Luke G England

Kwan-Yong Lim

Emi Ishida

Ryan Ryoung-Han Kim

Youngtag Woo

Sanjay K Jha

Ming Yin Hao

Rahul Agarwal

Motoi Ichihashi

Felicia Heiler

Methods of forming an integrated InGaN/GaN or AlInGaP/InGaP LED on Si CMOS for RGB colors and the resulting devices are provided. Embodiments include forming trenches having a v-shaped bottom through an oxide layer and a portion of a substrate; forming AlN or GaAs in the v-shaped bottom; forming a n-GaN or n-InGaP pillar on the AlN or GaAs through and above the first oxide layer; forming an InGaN/GaN MQW or AlInGaP/InGaP MQW over the n-GaN or n-InGaP pillar; forming a p-GaN or p-InGaP layer over the n-GaN pillar and InGaN/GaN MQW or the n-InGaP pillar and AlInGaP/InGaP MQW down to the first oxide layer; forming a TCO layer over the first oxide layer and the p-GaN or p-InGaP layer; forming a second oxide layer over the TCO layer; and forming a metal pad on the TCO layer above each n-GaN or n-InGaP pillar.

Nanowire formation methods

The present disclosure generally relates to semiconductor structures and, more particularly, to finFETs for light emitting diode displays and methods of manufacture. The method includes: forming replacement fin structures with a doped core region, on doped substrate material; forming quantum wells over the replacement fin structures; forming a first color emitting region by doping at least one of the quantum wells over at least a first replacement fin structure of the replacement fin structures, while protecting at least a second replacement fin structure of the replacement fin structures; and forming a second color emitting region by doping another one of the quantum wells over the at least second replacement fin structure of the replacement fin structures, while protecting the first replacement fin structure and other replacement fin structures which are not to be doped.

FinFETs for light emitting diode displays

A color stacked light emitting diode (LED) pixel is disclosed. The color stacked LED includes an LED pixel structure body, a base LED disposed on at least a portion of the LED pixel structure body, an intermediate LED disposed on the base LED, and a top LED disposed on the intermediate LED. The stacked LED may be an overlapping or a non-overlapping LED pixel. The LED pixel structure body may be a fin body or a nanowire body.

Light emitting diodes (LEDs) with stacked multi-color pixels for displays

The present disclosure relates to semiconductor structures and, more particularly, to integrated vertical transistors and light emitting diodes and methods of manufacture. The structure includes a vertically oriented stack of material having a light emitting diode (LED) integrated with a source region and a drain region of a vertically oriented active device.

Integrated vertical transistors and light emitting diodes

Disclosed is a device which includes first and second major substrate surfaces. The first substrate surface includes an LED with first and second terminals while the second substrate surface includes CMOS circuit components. The CMOS components and LED are coupled by through silicon via (TSV) contacts which extend through the second substrate surface.

Light emitting diodes (LEDs) with integrated CMOS circuits

The present disclosure generally relates to semiconductor structures and, more particularly, to light emitting diodes and methods of manufacture. The method includes: forming fin structures with a doped core region, on a substrate material; forming a first color emitting region by cladding the doped core region of a first fin structure of the fin structures, while protecting the doped core regions of a second fin structure and a third fin structure of the fin structures; forming a second color emitting region by cladding the doped core region of the second fin structure, while protecting the doped core regions of the first fin structure and the third fin structure; and forming a third color emitting region by cladding the doped core region of the third fin structure, while protecting the doped core regions of the first fin structure and the second fin structure.

Light emitting diodes

A semiconductor structure, comprising a semiconductor substrate; at least one fin, wherein the at least one fin comprises one or more first layers and one or more second layers, wherein the first layers and the second layers are interspersed and the first layers laterally extend further than the second layers; a dummy gate structure comprising a first spacer material disposed on sidewalls of the dummy gate; a second spacer material disposed adjacent to each of the second layers, wherein sidewalls of the fin comprise exposed portions of each of the first layers and the second spacer material, and an epitaxial source/drain material disposed on at least the exposed portions of each of the first layers. Methods and systems for forming the semiconductor structure.

Methods, apparatus, and system for improved nanowire/nanosheet spacers

The present disclosure generally relates to semiconductor structures and, more particularly, to light emitting diode (LED) structures and methods of manufacture. The method includes: forming a buffer layer on a substrate, the buffer layer having at least a lattice mismatch with the substrate; and relaxing the buffer layer by pixelating the buffer layer into discrete islands, prior to formation of a quantum well.

Light emitting diode structures

Devices and methods of forming the devices are disclosed. The device includes a substrate and a color LED pixel disposed on the substrate. The color LED pixel includes a red LED, a green LED and a blue LED. Each of the color LED includes a specific color LED body disposed on the respective color region on the substrate, a specific color multiple quantum well (MQW) on the respective color LED body and a specific color top LED layer disposed over the respective color MQW. The MQWs of the red LED, green LED and blue LED includes at least an indium gallium nitride (InGaN) layer and a gallium nitride (GaN), where x is the atomic percentage of In in the InGaN layer, and the MQWs of the red LED, green LED and blue LED have different bandgaps by varying x of the InGaN layer in the red LED, the green LED and the blue LED.

LEDs with three color RGB pixels for displays

Methods of forming an integrated RGB LED and Si CMOS driver wafer and the resulting devices are provided. Embodiments include providing a plurality of first color die over a CMOS wafer, each first color die being laterally separated with a first oxide and electrically connected to the CMOS wafer; providing a second color die above each first color die, each second color die being separated from each other with a second oxide, bonded to a first color die, and electrically connected to the CMOS wafer through the bonded first color die; removing a portion of each second color die to expose a portion of each bonded first color die; forming a conformal TCO layer over each first and second color die and on a side surface of each second color die and oxide; forming a PECVD oxide layer over the CMOS wafer; and planarizing the PECVD oxide layer.

Method of manufacturing a 3 color LED integrated Si CMOS driver wafer using die to wafer bonding approach

An integrated circuit (IC) microdisplay structure is disclosed. The structure can include: a first oxide layer positioned on a substrate; a first voltage source (VSS) pad within the first oxide layer; a metal pillar disposed within the first oxide layer and on the first VSS pad; a first gallium nitride layer disposed on the metal pillar and extending over the first oxide layer; and at least one subpixel formed from the first gallium nitride layer. Alternatively, the structure can include a first oxide layer positioned on a substrate; a first metal layer positioned on the first oxide layer; a first gallium nitride layer on the first metal layer; and at least one subpixel formed from the first gallium nitride layer. The structure may further include a subpixel driver electrically connected to the at least one subpixels where a portion of the subpixel driver is vertically aligned with a subpixel.

Assembly of CMOS driver wafer and LED wafer for microdisplay

The present disclosure relates to semiconductor structures and, more particularly, to semiconductor wafers with reduced bowing and warping and methods of manufacture. The structure includes a substrate including plurality of trenches which have progressively different depths as they extend radially inwardly from an edge of the substrate towards a center of the substrate.

Semiconductor wafers with reduced bow and warpage

A display system is disclosed. The display system comprises a light emitting diode (LED) device and a backplane (BP) device. The LED device comprises a plurality of LEDs having LED terminals. An LED bonding surface comprising a dielectric layer with LED bonding surface contact pads is coupled to diode terminals of the LEDs. The backplane (BP) device comprises a BP substrate having top and bottom surfaces. A plurality of system on chip (SoC) chips are bonded to chip pads disposed on a bottom surface of the BP device. The SoC chips are electrically coupled to the CMOS components of the BP device and LEDs of the LED device.

Growing community of inventors

Santa Clara, CA, United States of America

Deepak K Nayak