Kla Tencor Corporation

Kla-Tencor Technologies Corporation

Hamamatsu-Photonics K.k.

Kla Corporation

Kla-Tencor Coporation

David Lee Brown

Yung-Ho Alex Chuang

John Fielden

Jingjing Zhang

Venkatraman Iyer

J Joseph Armstrong

Bin-Ming Benjamin Tsai

Jehn-Huar Chern

Devis Contarato

Guowu Zheng

Gildardo Rios Delgado

Ali R Ehsani

David R Shafer

Masaharu Muramatsu

Yehiel Gotkis

Yasuhito Yoneta

Vladimir L Dribinski

Kirk Joseph Bertsche

David Aitan Soltz

Richard William Solarz

Justin Dianhuan Liou

Shinya Otsuka

George H Zapalac, Jr

J Kirkwood H Rough

Sharon Zamek

Hisanori Suzuki

Lance Glasser

Mark Shi Wang

Kurt Lehman

Henrik Nielsen

Marcel Trimpl

Kenneth F Hatch

Keith Lyon

Mansour Kermat

Amnon Manassen

Guoheng Zhao

Andrew V Hill

Mark Armstrong McCord

Stephen Biellak

Daniel Ivanov Kavaldjiev

Jason Z Lin

Xuefeng Liu

Donald Pettibone

Tom Miller

Kai Cao

Yury Yuditsky

Sisir Yalamanchili

Steve Zamek

Jehn-Huar Chem

Alex Chuang

Joseph J Armstrong

A method for imaging overlay targets on a wafer includes (1) using a sensor to acquire images of overlay targets on a wafer while the wafer is in motion and (2) accelerating and decelerating the wafer to move the overlay targets into alignment with the sensor between acquiring images of the overlay targets. Accelerating/decelerating the wafer may include: (1) accelerating the wafer at a maximum acceleration and then decelerating the wafer at a maximum deceleration, (2) accelerating/decelerating the wafer in a triangular waveform pattern, (3) accelerating/decelerating the wafer in a sinusoidal pattern, or (4) accelerating/decelerating the wafer in a near-sinusoidal pattern (created by combining a pure sinusoidal profile with one or more harmonic profiles). A system is also provided for implementing the above method(s).

Modulation of scanning velocity during overlay metrology

An image sensor for electrons or short-wavelength light includes a semiconductor membrane, circuit elements formed on one surface of the semiconductor membrane, and a pure boron layer on the other surface of the semiconductor membrane. The circuit elements are connected by metal interconnects comprising a refractory metal. An anti-reflection or protective layer may be formed on top of the pure boron layer. This image sensor has high efficiency and good stability even under continuous use at high flux for multiple years. The image sensor may be fabricated using CCD (charge coupled device) or CMOS (complementary metal oxide semiconductor) technology. The image sensor may be a two-dimensional area sensor, or a one-dimensional array sensor.

Back-illuminated sensor and a method of manufacturing a sensor

An image sensor utilizes a pure boron layer and a second epitaxial layer having a p-type dopant concentration gradient to enhance sensing DUV, VUV or EUV radiation. Sensing (circuit) elements and associated metal interconnects are fabricated on an upper surface of a first epitaxial layer, then the second epitaxial layer is formed on a lower surface of the first epitaxial layer, and then a pure boron layer is formed on the second epitaxial layer. The p-type dopant concentration gradient is generated by systematically increasing a concentration of p-type dopant in the gas used during deposition/growth of the second epitaxial layer such that a lowest p-type dopant concentration of the second epitaxial layer occurs immediately adjacent to the interface with the first epitaxial layer, and such that a highest p-type dopant concentration of the second epitaxial layer occurs immediately adjacent to the interface with pure boron layer.

A multiple-column-per-channel image CCD sensor utilizes a multiple-column-per-channel readout circuit including connected transfer gates that alternately transfer pixel data (charges) from a group of adjacent pixel columns to a shared output circuit at high speed with low noise. Charges transferred along the adjacent pixel columns at a line clock rate are alternately passed by the transfer gates to a summing gate that is operated at multiple times the line clock rate to pass the image charges to the shared output circuit. A symmetrical fork-shaped diffusion is utilized in one embodiment to merge the image charges from the group of related pixel columns. A method of driving the multiple-column-per-channel CCD sensor with line clock synchronization is also described. A method of inspecting a sample using the multiple-column-per-channel CCD sensor is also described.

Multiple column per channel CCD sensor architecture for inspection and metrology

A dual-column-parallel image CCD sensor utilizes a dual-column-parallel readout circuit including two pairs of cross-connected transfer gates to alternately transfer pixel data (charges) from a pair of adjacent pixel columns to a shared output circuit at high speed with low noise. Charges transferred along the two adjacent pixel columns at a line clock rate are alternately passed by the transfer gates to a summing gate that is operated at twice the line clock rate to pass the image charges to the shared output circuit. A symmetrical Y-shaped diffusion is utilized in one embodiment to merge the image charges from the two pixel columns. A method of driving the dual-column-parallel CCD sensor with line clock synchronization is also described. A method of inspecting a sample using the dual-column-parallel CCD sensor is also described.

Dual-column-parallel CCD sensor and inspection systems using a sensor

A time delay and integration charge coupled device includes an array of pixels and a clock generator. The array of pixels is distributed in a scan direction and a line direction perpendicular to the scan direction in which at least some of the pixels of the array include three or more gates aligned in the scan direction. The clock generator provides clocking signals to transfer charge along the scan direction between two or more pixel groups including two or more pixels adjacent in the scan direction. The clocking signals include phase signals to transfer the charge to an adjacent pixel group along the scan direction at a rate corresponding to the velocity of the target by driving the gates of the two or more pixel groups and generating a common potential well per pixel group for containing charge generated in response to incident illumination.

Power-conserving clocking for scanning sensors

A scanning electron microscope incorporates a multi-pixel solid-state electron detector. The multi-pixel solid-state detector may detect back-scattered and/or secondary electrons. The multi-pixel solid-state detector may incorporate analog-to-digital converters and other circuits. The multi-pixel solid state detector may be capable of approximately determining the energy of incident electrons and/or may contain circuits for processing or analyzing the electron signals. The multi-pixel solid state detector is suitable for high-speed operation such as at a speed of about 100 MHz or higher. The scanning electron microscope may be used for reviewing, inspecting or measuring a sample such as unpatterned semiconductor wafer, a patterned semiconductor wafer, a reticle or a photomask. A method of reviewing or inspecting a sample is also described.

Scanning electron microscope and methods of inspecting and reviewing samples

An inspection system and methods in which analog image data values (charges) captured by an image sensor are binned (combined) before or while being transmitted as output signals on the image sensor's output sensing nodes (floating diffusions), and in which an ADC is controlled to sequentially generate multiple corresponding digital image data values between each reset of the output sensing nodes. According to an output binning method, the image sensor is driven to sequentially transfer multiple charges onto the output sensing nodes between each reset, and the ADC is controlled to convert the incrementally increasing output signal after each charge is transferred onto the output sensing node. According to a multi-sampling method, multiple charges are vertically or horizontally binned (summed/combined) before being transferred onto the output sensing node, and the ADC samples each corresponding output signal multiple times. The output binning and multi-sampling methods may be combined.

Dark-field inspection using a low-noise sensor

An inspection system including an optical system (optics) to direct light from an illumination source to a sample, and to direct light reflected/scattered from the sample to one or more image sensors. At least one image sensor of the system is formed on a semiconductor membrane including an epitaxial layer having opposing surfaces, with circuit elements formed on one surface of the epitaxial layer, and a pure boron layer and a doped layer on the other surface of the epitaxial layer. The image sensor may be fabricated using CCD (charge coupled device) or CMOS (complementary metal oxide semiconductor) technology. The image sensor may be a two-dimensional area sensor, or a one-dimensional array sensor. The image sensor can be included in an electron-bombarded image sensor and/or in an inspection system.

Back-illuminated sensor with boron layer

An imaging sensor assembly includes at least one substrate including a plurality of substrate signal lines. The imaging sensor assembly also includes at least one imaging sensor package disposed on the at least one substrate, the at least one imaging sensor package including at least one imaging sensor disposed on at least one imaging sensor package substrate. The imaging sensor assembly also includes at least one receiver package disposed on the at least one substrate, the receiver package including at least one receiver integrated circuit disposed on at least one receiver package substrate. The imaging sensor assembly also includes at least one electrical interconnect operably coupled to the at least one imaging sensor package and the at least one receiver package. A plurality of data signals are transmitted between the at least one imaging sensor package and the at least one receiver package via the at least one electrical interconnect.

Apparatus for high-speed imaging sensor data transfer

An image sensor for short-wavelength light includes a semiconductor membrane, circuit elements formed on one surface of the semiconductor membrane, and a pure boron layer on the other surface of the semiconductor membrane. An anti-reflection or protective layer is formed on top of the pure boron layer. This image sensor has high efficiency and good stability even under continuous use at high flux for multiple years. The image sensor may be fabricated using CCD (charge coupled device) or CMOS (complementary metal oxide semiconductor) technology. The image sensor may be a two-dimensional area sensor, or a one-dimensional array sensor.

Anti-reflection layer for back-illuminated sensor

A focusing EBCCD includes a control device positioned between a photocathode and a CCD. The control device has a plurality of holes therein, wherein the plurality of holes are formed perpendicular to a surface of the photocathode, and wherein a pattern of the plurality of holes is aligned with a pattern of pixels in the CCD. Each hole is surrounded by at least one first electrode, which is formed on a surface of the control device facing the photocathode. The control device may include a plurality of ridges between the holes. The control device may be separated from the photocathode by approximately half a shorter dimension of a CCD pixel or less. A plurality of first electrodes may be provided, wherein each first electrode surrounds a given hole and is separated from the given hole by a gap.

Electron-bombarded charge-coupled device and inspection systems using EBCCD detectors

A pulse multiplier includes a polarizing beam splitter, a wave plate, and a set of multi-surface reflecting components (e.g., one or more etalons and one or more mirrors). The polarizing beam splitter passes input laser pulses through the wave plate to the multi-surface reflecting components, which reflect portions of each input laser pulse back through the wave plate to the polarizing beam splitter. The polarizing beam splitter reflects each reflected portion to form an output of the pulse multiplier. The multi-surface reflecting components are configured such that the output pulses exiting the pulse multiplier have an output repetition pulse frequency rate that is at least double the input repetition pulse frequency.

Semiconductor inspection and metrology system using laser pulse multiplier

Pixel aperture size adjustment in a linear sensor is achieved by applying more negative control voltages to central regions of the pixel's resistive control gate, and applying more positive control voltages to the gate's end portions. These control voltages cause the resistive control gate to generate an electric field that drives photoelectrons generated in a selected portion of the pixel's light sensitive region into a charge accumulation region for subsequent measurement, and drives photoelectrons generated in other portions of the pixel's light sensitive region away from the charge accumulation region for subsequent discard or simultaneous readout. A system utilizes optics to direct light received at different angles or locations from a sample into corresponding different portions of each pixel's light sensitive region. Multiple aperture control electrodes are selectively actuated to collect/measure light received from either narrow or wide ranges of angles or locations, thereby enabling rapid image data adjustment.

Sensor with electrically controllable aperture for inspection and metrology systems

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Los Gatos, CA, United States of America

David Lee Brown