Nxp Usa, Inc.

Motorola Corporation

Freescale Semiconductor,inc.

David James Dougherty

Lakshminarayan Viswanathan

Audel Sanchez

Jerry Lynn White

Brian W Condie

Frank Danaher

Peter H Aaen

Hamdan Ismail

Aruna Manoharan

Manuel F Romero

Jaynal Abedin Molla

Mahesh K Shah

Victor J Adams

Scott Duncan Marshall

Jean-Christophe Nanan

Tianwei Sun

Xavier Hue

John W Hart, Jr

Betty H Yeung

Sharan Kishore

Paul L Sullivan

Robert W Kamb

Edward Christian Mares

Overmolded microelectronic packages containing knurled base flanges are provided, as are methods for producing the same. In various embodiments, the overmolded microelectronic package includes a molded package body, at least one microelectronic device contained in the molded package body, and a base flange to which the molded package body is bonded. The base flange includes, in turn, a flange frontside contacted by the molded package body, a device attachment region located on the flange frontside and to which the at least one microelectronic is mounted, and a knurled surface region. The knurled surface region includes a first plurality of trenches formed in the base flange and arranged in a first repeating geometric pattern. The molded package body extends or projects into the first plurality of trenches to decrease the likelihood of delamination of the molded package body from the base flange.

Overmolded microelectronic packages containing knurled flanges and methods for the production thereof

Embodiments of Doherty Power Amplifier (PA) and other PA packages are provided, as are systems including PA packages. In embodiments, the PA package includes a package body having a longitudinal axis, a first group of input-side leads projecting from a first side of the package body and having an intra-group lead spacing, and a first group of output-side leads projecting from a second side of the package body and also having the intra-group lead spacing. A first carrier input lead projects from the first package body side and is spaced from the first group of input-side leads by an input-side isolation gap, which has a width exceeding the intra-group lead spacing. Similarly, a first carrier output lead projects from the second package body side, is laterally aligned with the first carrier input lead, and is separated from the first group of output-side leads by an output-side isolation gap.

Power amplifier packages and systems incorporating design-flexible package platforms

Power amplifier devices and methods for fabricating power amplifier devices containing frontside heat extraction structures are disclosed. In embodiments, the power amplifier device includes a substrate, a radio frequency (RF) power die bonded to a die support surface of the substrate, and a frontside heat extraction structure further attached to the die support surface. The frontside heat extraction structure includes, in turn, a transistor-overlay portion in direct thermal contact with a frontside of the RF power die, a first heatsink coupling portion thermally coupled to a heatsink region of the substrate, and a primary heat extraction path extending from the transistor-overlay portion to the first heatsink coupling portion. The primary heat extraction path promotes conductive heat transfer from the RF power die to the heatsink region and reduce local temperatures within a transistor channel of the RF power die during operation of the power amplifier device.

Power amplifier devices containing frontside heat extraction structures and methods for the fabrication thereof

Power amplifier (PA) packages containing peripherally-encapsulated dies are provided, as are methods for fabricating such PA packages. In embodiments, a method for fabricating a PA package includes obtaining a die-substrate assembly containing a radio frequency (RF) power die, a package substrate, and a die bond layer. The die bond layer is composed of at least one metallic constituent and electrically couples a backside of the RF power die to the package substrate. A peripheral encapsulant body is formed around the RF power die and covers at least a portion of the die bond layer, while leaving at least a majority of a frontside of the RF power die uncovered. Before or after forming the peripheral encapsulant body, terminals of the PA package are interconnected with the RF power die; and a cover piece is bonded to the die-substrate assembly to enclose a gas-containing cavity within the PA package.

Power amplifier packages containing peripherally-encapsulated dies and methods for the fabrication thereof

A single semiconductor device package that reduces electromagnetic coupling between elements of a semiconductor device embodied within the package is provided. For a dual-path amplifier, such as a Doherty power amplifier, an isolation feature that separates carrier amplifier elements from peaking amplifier elements is included within the semiconductor device package. The isolation feature can take the form of a structure that is constructed of a conductive material coupled to ground and which separates the elements of the amplifier. The isolation feature can be included in a variety of semiconductor packages, including air cavity packages and overmolded packages. Through the use of the isolation feature provided by embodiments of the present invention a significant improvement in signal isolation between amplifier elements is realized, thereby improving performance of the dual-path amplifier.

Semiconductor package design providing reduced electromagnetic coupling between circuit components

An embodiment of a die assembly includes a flange, lip walls, and leads for electrical contact with one or more die mounted on the flange. The flange has first and second opposed flange surfaces and flange sidewalls extending between the surfaces. The lip walls have first and second opposed lip surfaces and lip sidewalls extending between the first and second lip surfaces. The lip sidewalls are positioned adjacent to the flange sidewalls. The leads, which have inboard end portions and outboard end portions, are configured to preserve a seating plane. The seating plane is spaced apart from a plane of the second flange surface. The inboard end portions of the leads are embedded in the lip walls, and extend from the seating plane upward through the lip walls toward the first lip surfaces. The outboard end portions are aligned substantially within the seating plane.

Die assemblies

A method is provided for manufacturing a semiconductor device from a substrate () having an active surface () and a non-active surface (). The method comprises depositing a backing material () onto the non-active surface of the substrate () in a pattern (), the pattern () having at least a first die section (), a second die section () adjacent the first die section (), and a strip () connecting the first die section () and the second die section (), removing material from portions of the non-active surface of the substrate () on which the backing material () is not deposited to thereby partially separate the substrate () into a first die () and a second die () connected to one another by the strip () of the deposited backing material, and breaking the strip connector () to separate the first die () from the second die ().

Chemical die singulation technique

A semiconductor device () is provided which comprises a substrate and a die () having a first surface which is attached to the substrate by way of a die attach material. At least a portion () of the perimeter of the die is resistant to wetting by the die attach material, either through treatment with a dewetting agent or by selective removal of the backside metallization. It is found that this construction allows the surface area of the die to be increased without increasing the incidence of cracking and chipping along the sawn edges of the die.

Low stress semiconductor die attach

A package assembly (70) for encapsulating and vertically surface mounting a semiconductor device such as an accelerometer includes a semiconductor device (40), a package (44) enclosing the semiconductor device, and a plurality of leads (16, 18) protruding from the package. The plurality of leads are formed from a common leadframe (10) and an internal portion of a first lead of the plurality of leads is offset from a common plane corresponding to the common leadframe prior to forming any of the plurality of leads. The offset lead increases the rigidity and vibration-resistance of the package assembly.

Package assembly for an electronic component

A method of forming a package assembly (10) including a package (12) that encapsulates an electronic die. A leadframe (30) has edge rails (32), and the die is disposed on the leadframe. The package is formed around the die to encapsulate it, and the leadframe is trimmed to provide a plurality of leads (14) protruding from a first side of the package. This trimming also provides a support (16) connected to a second side of the package. The support is bent to be substantially orthogonal to the common plane containing the leads. A mounting tip (26) on the support is thus disposed outside of the common plane. This support improves the rigidity and natural bending frequency of the package assembly.

Growing community of inventors

Tempe, AZ, United States of America

David James Dougherty