Freescale Semiconductor,inc.

David C Sing

Leo Mathew

Venkat Kolagunta

Ramachandran Muralidhar

Gowrishankar L Chindalore

Rajesh A Rao

Tab Allen Stephens

Jane A Yater

Vishal P Trivedi

Byoung W Min

Tushar Praful Merchant

James Kenyon Schaeffer, Iii

John J Hackenberg

Daniel G Tekleab

A method for making a transistor is provided which comprises (a) providing a semiconductor structure having a gate () overlying a semiconductor layer (), and having at least one spacer structure () disposed adjacent to said gate; (b) removing a portion of the semiconductor structure adjacent to the spacer structure, thereby exposing a portion () of the semiconductor structure which underlies the spacer structure; and (c) subjecting the exposed portion of the semiconductor structure to an angled implant ().

Method to improve source/drain parasitics in vertical devices

A resistive device () and a transistor () are formed. Each uses a portion of a metal layer () that is formed at the same time and thus additional process steps are avoided to remove the metal from the resistive device. The metal used in the resistive device is selectively treated to increase the resistance in the resistive device. A polycrystalline semiconductor material layer () overlies the metal layer in the resistive device. The combination of these layers provides the resistive device. In one form the metal is treated after formation of the polycrystalline semiconductor material layer. In one form the metal treatment involves an implant of a species, such as oxygen, to increase the resistivity of the metal. Various transistor structures are formed using the untreated portion of the metal layer as a control electrode.

Semiconductor device with integrated resistive element and method of making

An electronic device can include a nonvolatile memory cell having DSEs within a dielectric layer. In one aspect, a process of forming the electronic device can include implanting and nucleating a first charge-storage material to form DSEs. The process can also include implanting a second charge-storage material and growing the DSEs such that the DSEs include the first and second charge-storage material. In another aspect, a process of forming the electronic device can include forming a semiconductor layer over a dielectric layer, implanting a charge-storage material, and annealing the dielectric layer. After annealing, substantially none of the charge-storage material remains within a denuded zone within the dielectric layer. In a third aspect, within a dielectric layer, a first set of DSEs can be spaced apart from a second set of DSEs, wherein substantially no DSEs lie between the first set of DSEs and the second set of DSEs.

Process of forming an electronic device including discontinuous storage elements within a dielectric layer

A semiconductor device is formed by patterning a semiconductor layer to create a vertical active region and a horizontal active region, wherein the horizontal active region is adjacent the vertical active region. The semiconductor layer overlies an insulating layer. A spacer is formed adjacent the vertical active region and over a portion of the horizontal active region. At least a portion of the horizontal active region is oxidized to form an isolation region. The spacer is removed. A gate dielectric is formed over the vertical active region after removing the spacer. A gate electrode is formed over the gate dielectric. However, forming the spacer is optional.

Method of forming a semiconductor device with decreased undercutting of semiconductor material

A method for forming a semiconductor device including forming a semiconductor substrate; forming a gate electrode over the semiconductor substrate having a first side and a second side, and forming a gate dielectric under the gate electrode. The gate dielectric has a first area under the gate electrode and adjacent the first side of the gate electrode, a second area under the gate electrode and adjacent the second side of the gate electrode, and a third area under the gate electrode that is between the first area and the second area, wherein the first area is thinner than the second area, and the third area is thinner than the first area and is thinner than the second area.

Method of forming a semiconductor device having asymmetric dielectric regions and structure thereof

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Austin, TX, United States of America

David C Sing