International Business Machines Corporation

Globalfoundries Inc.

Other

Globalfoundries U.S. 2 LLC

David Brian Stone

Janak G Patel

Peter Slota, Jr

Mark C Lamorey

Mark C H Lamorey

James Robert Wilcox

Timothy W Budell

John Steven Kresge

Luke D Lacroix

Thomas P Gall

Robert David Sebesta

James Steven Kamperman

James V Crain, Jr

Mark Vincent Pierson

Douglas Oliver Powell

Michael A Gaynes

Wolfgang Sauter

Thomas M Shaw

David John Russell

Donald Seton Farquhar

Shidong Li

Elizabeth F Foster

Ross William Keesler

Eric W Tremble

Erwin B Cohen

Robert F White

Charles W Griffin

Jason E Blanchet

Todd W Davies

William Louis Brodsky

Christopher David Muzzy

Robert Maynard Japp

David L Questad

David Noel Light

Steven Frederick Oakland

Natalie Barbara Feilchenfeld

Samuel R Connor

Jerzy Maria Zalesinski

Lisa Jeanine Jimarez

Anson Jay Call

Gerald Walter Jones

Francis Joseph Downes, Jr

Andrew Michael Seman

Matthew Thomas Guzowski

Craig P Lussier

Mark Curtis Hayes Lamorey

Thomas P Comino

Steven G Rosser

Richard Dauphin

Dany Minier

Kerry Paul Pfarr

Robert Charles Cusimano

Adam Matthew Bittner

Patrick G Wilder

Evan G Colgan

Timothy Harrison Daubenspeck

Griselda Bonilla

Xiao Hu Liu

Frank Daniel Egitto

Wayne John Howell

Howard Smith Landis

Jeffrey Scott Campbell

William John Rudik

Nicholas A Polomoff

Mark William Kuemerle

Anthony P Ingraham

Ramesh R Kodnani

Michael Wozniak

Stephen Joseph Fuerniss

Jaynal Abedin Molla

Paul Robert Walling

Thurston Bryce Youngs, Jr

Russell Thomas White, Jr

James D Herard

Ernest Bassous

Michael R Scheuermann

Gobinda Das

Kathryn C Rivera

Ronald P Nowak

Lawrence Richard Cutting

John R Slack

Timothy F Carden

James R Loomis

Cheryl L Tytran-Palomaki

Donald J Mikalsen

Bonnie S McClure

Marek Andrzej Orlowski

J Richard Behun

Steven F Arndt

Jeffrey C Baechtle

Seungman Choi

Eric S Parent

Esmaeil Rahmati

Anne M Quinn, Deceased

Paul Gerard Wilkin

Scott K Pozder

Thiagarajan Raman

Kristina Young-Fisher

Samantha Donovan

Cheryl L Tytran

Package assemblies including a die stack and related methods of use. The package assembly includes a substrate with a first surface, a second surface, and a third surface bordering a through-hole extending from the first surface to the second surface. The assembly further includes a die stack, a conductive layer, and a lid. The die stack includes a chip positioned inside the through-hole in the substrate. A section of the conductive layer is disposed on the third surface of the substrate. A portion of the lid is disposed between the first chip and the section of the conductive layer. The conductive layer is configured to be coupled with power, and the lid is configured to be coupled with ground. The portion of the lid may act as a first plate of a capacitor, and the section of the conductive layer may act as a second plate of the capacitor.

Shielded package assemblies with integrated capacitor

An IC chip structure including a plurality of IC chips electrically connected to one another in back-end-of-line (BEOL) interconnect layer of the structure is disclosed. The IC structure may include openings in crack-stop structures surrounding the IC chips and a interconnect wire extending between the IC chips through the openings. A packaging structure for utilizing the IC structure where at least one IC chip is inoperable is also disclosed. The structure may include a first bond pad array on a top surface of a packaging substrate including operable bond pads connected to an operable IC chip and structural support bond pads connected to the inoperable IC chip; a second bond pad array on a bottom surface of the substrate including operable bond pads connected to a single IC chip printed circuit board; and an interconnect structure for connecting the operable bond pads of the first and second bond pad arrays.

Interconnected integrated circuit (IC) chip structure and packaging and method of forming same

A laminate structure includes a conductive layer and a dielectric layer in contact with the conductive layer, the dielectric layer comprises a selectively patterned high-modulus dielectric material that balances a differential stress between the conductive layer and the dielectric layer to mechanically stiffen the laminate structure and reduce warpage.

Reduced-warpage laminate structure

Bond pad structures and methods for fabricating bond pad structures. A bond pad and a plurality of fill lines are formed on the top surface of a dielectric layer. The fill lines are arranged on the top surface of the dielectric layer adjacent to the bond pad, and may be separated from the bond pad by a fill keep-out zone. One or more Under Bump Metallurgy (UBM) layers may be arranged on the bond pad and may extend outwardly to overlap with the fill lines.

Bond pads with surrounding fill lines

A multi-chip module, and method of fabricating the multi-chip module. The multi-chip module includes: a substrate containing multiple wiring layers, each wiring layer having first pads on a top surface of the substrate and second pads on a bottom surface of the substrate, wherein the second pads include split pad and a conventional pad; a first solder ball in direct physical contact with a contiguous bottom surface of the conventional pad and connected to a next level of packaging under the conventional pad, wherein the first solder ball has a first height; and a second solder ball in direct physical contact with first and second sections of the split pad separated by a gap, wherein the second solder ball has a second height that is sufficiently less than the first height such that the second solder ball is not connected to the next level of packaging.

Split ball grid array pad for multi-chip modules

Heat spreader lids and package assemblies including a heat spreader lid. The heat spreader lid has a central region configured to be coupled with an electronic component, a peripheral region configured to be coupled with a substrate, and a connecting region arranged between the central region and the peripheral region. The connecting region is configured to impart stress relief to the central region.

Flexible heat spreader lid

A multi-chip module and method of fabricating a multi-chip module. The multi-chip module includes: a substrate having a top surface and a bottom surface and containing multiple wiring layers, first pads on the top surface of the substrate and second pads on the bottom surface of the substrate; a first active component attached to a first group of the first pads and a second active component attached to a second group of the first pads; wherein at least one pad of the second pads is a split pad having a first section and a non-contiguous second section separated by a gap, the first section connected by a first wire of the multiple wires to a pad of the first group of first pads and the second section is connected by a second wire of the multiple wires to a pad of the second group of first pads.

Detection circuits, methods of use and manufacture and design structures are provided herein. The structure includes at least one signal line traversing one or more metal layers of an integrated circuit. Circuitry is coupled to the at least one signal line, which is structured to receive a signal with a known signal from the at least one signal line or a signal from a different potential and, based on which signal is received, determine whether there is a structural defect in the integrated circuit.

Circuit for detecting structural defects in an integrated circuit chip, methods of use and manufacture and design structures

A corner crackstop is formed in each of the four corners of an integrated circuit (IC) chip, in which the corner crackstop differs structurally from a portion of the crackstop disposed along the sides of the IC chip. Each corner crackstop includes a plurality of layers, formed on a top surface of a silicon layer of the IC chip, within a perimeter boundary region that comprises a triangular area, in which a right angle is disposed on a bisector of the corner, equilateral sides of the triangle are parallel to sides of the IC chip, and the right angle is proximate to the corner relative to a hypotenuse of the triangle. The plurality of layers of the corner crackstop include crackstop elements, each comprising a metal cap centered over a via bar, in which the plurality of layers of the corner crackstop is chamfered to deflect crack ingress forces by each corner crackstop.

Chamfered corner crackstop for an integrated circuit chip

Packages for a three-dimensional die stack, methods for fabricating a package for a three-dimensional die stack, and methods for distributing power in a package for a three-dimensional die stack. The package may include a first lid, a second lid, a die stack located between the first lid and the second lid, a first thermal interface material layer between the first lid and a first die of the die stack, and a second thermal interface material layer between the second lid and the second die of the die stack. The second thermal interface material layer is comprised of a thermal interface material having a high electrical conductivity and a high thermal conductivity.

Packages for three-dimensional die stacks

Growing community of inventors

Jericho, VT, United States of America

David Brian Stone