Intel Corporation

Dale A Hackitt

Brian Taggart

Vijay K Nair

Robert M Nickerson

Dingying David Xu

Carlton E Hanna

Behrooz Z Mehr

Saeed S Shojaie

Dilip K Misra

Brian Taggert

A semiconductor device package having reduced form factor and a method for forming said semiconductor device are disclosed. In an embodiment, an active die is embedded within a cavity in the core layer of the package substrate, wherein an in-situ electromagnetic shield is formed on the sidewalls of the cavity. In another embodiment, a crystal oscillator is at least partially embedded within the core layer of the package substrate. In another embodiment, a package having a component embedded in the core layer is mounted on a PCB, and a crystal oscillator generating a clock frequency for the package is mounted on the PCB. By embedding components within the core or removing components from the package to be mounted directly on the PCB, the x, y, and z dimensions of a package may be reduced. In addition, in-situ electromagnetic shield may reduce EM noise emitted from the active die.

Ultra slim RF package for ultrabooks and smart phones

An apparatus, a method, and a system associated with microelectronic packaging are disclosed herein. In various embodiments, a microelectronic package may include a die having one or more through-vias, each filled with a solder material; a substrate; and one or more solder bumps disposed between and electrically connecting the substrate and a backside of the die.

Microelectronic package having solder-filled through-vias

A method of forming a leadframe package, a leadframe package formed according to the method, and a system incorporating the leadframe package. The leadframe package includes: a metallization layer comprising a paddle portion and a contact portion including contact leads; a die mounted onto the paddle portion; wirebonds connected between the die and respective ones of the contact leads; an overmold encapsulating the die, the paddle portion, the contact leads and the wirebonds; and a stiffening element encapsulated in the overmold and unconnected to electrical pathways within the leadframe package.

Microelectronic package having a stiffening element and method of making same

Embodiments of the invention provide a microelectronic device having a heat spreader positioned between a chip and substrate to which the chip is electrically connected. For one embodiment of the invention, the heat spreader is a thermal slug having a coefficient of thermal expansion approximately equal to the coefficient of thermal expansion of the chip.

Bottom heat spreader

A wire-bonding substrate is described. The wire-bonding substrate includes a copper metallization and a gold surface finish disposed above and on the copper metallization. The gold surface finish completes a structure that includes at least one of a bond finger for wire bonding of a first side of the substrate, and a land pad for a ball attach on a second side of the substrate. A process of forming the surface finish is also disclosed. An electronic package is also disclosed that uses the surface finish on the wire-bonding substrate. A method of assembling an electronic package is also disclosed that includes the surface finish on the wire-bonding substrate. A computing system is also described that includes the surface finish on the wire-bonding substrate.

Use of direct gold surface finish on a copper wire-bond substrate, methods of making same, and methods of testing same

An integrated circuit package that contains a heat spreader which has a plurality of legs stamped from a sheet of metal material. The heat spreader also has a plurality of slots which allow plastic to flow between the bonding wires of the integrated circuit assembly during the molded injection process of the package.

Growing community of inventors

Mesa, AZ, United States of America

Dale A Hackitt