Samsung Electronics Co., Ltd.

Dae-youp Lee

Bong-cheol Kim

Jae-Han Lee

Jeung-woo Lee

Bong-Cheol Kim

Byeong-hwan Son

Joon-Hee Lee

Hyun-Woo Kim

Jeong-Ho Yeo

Suk-Joo Lee

Eun-sung Kim

Young-Moon Choi

Jeong-lim Nam

Jin-Hong Park

Jin-seok Heo

Suk-joo Lee

Hye-Soo Shin

Jong-su Park

Sang-youn Jo

Byeong-Hwan Son

Ja-min Koo

Jang-hwan Jeong

Sung-Hwan Byun

Do-yul Yoo

Ji-yong Yoo

Metal contacts are formed within a string overhead area using a double patterning technology (DPT) process thereby allowing for the reduction of a string overhead area and a concomitant reduction in the chip size of a semiconductor device. A first mask pattern is formed by etching a first mask layer, the first mask pattern including a first opening formed in a cell region and a first hole formed in a peripheral region. A first sacrificial pattern is formed on the first mask pattern and the exposed first insulating layer of the cell region using a double patterning technology process. Contact holes are formed by exposing the target layer by etching the first insulating layer using the first mask pattern and the first sacrificial pattern as an etch mask. Metal contacts are then formed in the contact holes.

Method of fabricating metal contact using double patterning technology and device formed thereby

A method of detecting reticle error may include using an optical source of an exposure unit to cause light to be incident on a reticle installed in the exposure unit, and detecting the reticle error using only 0diffraction light from among diffraction lights transmitted through the reticle. A method of detecting reticle error may include: installing a reticle, including a mask substrate and mask patterns having a critical dimension formed on the mask substrate, in an exposure unit to cause light to be incident on the reticle; exposing a photoresist film disposed on a wafer in the exposure unit using only 0diffraction light from among diffraction lights transmitted through the reticle; developing the exposed photoresist film; and analyzing a thickness change, an image, or the thickness change and image of the developed photoresist film, in order to detect the reticle error at a wafer level.

Method of detecting reticle errors

Provided are methods of forming patterns of semiconductor devices, whereby patterns having various widths may be simultaneously formed, and a pattern density may be doubled by a double patterning process in a portion of the semiconductor device. A dual mask layer is formed on a substrate. A variable mask layer is formed on the dual mask layer. A first photoresist pattern having a first thickness and a first width in the first region, and a second photoresist pattern having a second thickness greater than the first thickness and a second width wider than the first width in the second region are formed on the variable mask layer. A first mask pattern and a first variable mask pattern are formed in the first region, and a second mask pattern and a second variable mask pattern are formed in the second region, by sequentially etching the variable mask layer and the dual mask layer by using, as etch masks, the first photoresist pattern and the second photoresist pattern. First spacers covering side walls of the first mask pattern and second spacers covering side walls of the second mask pattern are formed. The first mask pattern is removed, and then the substrate is etched in the first region and the second region by using the first spacers as an etch mask in the first region, and the second mask pattern and the second spacers as an etch mask in the second region.

Methods of forming patterns for semiconductor devices

Provided is a photomask used in fabrication of a semiconductor device. The photomask includes first and second regions to be transferred onto a semiconductor substrate having a step difference. The first and second regions have mask patterns. The mask patterns of the first region have a different shape from the mask patterns of the second region. The mask patterns of the second region have concave and convex portions disposed in opposite lateral portions thereof.

Photomask used in fabrication of semiconductor device

Provided is a method of forming patterns of a semiconductor device, whereby patterns having various widths can be simultaneously formed, and pattern density can be doubled by a double patterning process in a portion of the semiconductor device. In the method of forming patterns of a semiconductor device, a first mold mask pattern and a second mold mask patter having different widths are formed on a substrate. A pair of first spacers covering both sidewalls of the first mold mask pattern and a pair of second spacers covering both sidewalls of the second mold mask pattern are formed. The first mold mask pattern and the second mold mask pattern are removed, and a wide-width mask pattern covering the second spacer is formed. A lower layer is etched using the first spacers, the second spacers, and the wide-width mask pattern as an etch mask.

Method of forming semiconductor device patterns

Disclosed is a method for manufacturing a semiconductor device by employing a dual damascene process. After a first insulation film including a conductive pattern is formed on a substrate, at least one etch stop film and at least one insulation film are alternatively formed on the first insulation film. A via hole for a contact or a trench for a metal wiring is formed through the insulation film, and then the via hole or the trench is filled with a filling film including a water-soluble polymer. After a photoresist film is coated on the filling film, the photoresist film is patterned to form a photoresist pattern and to remove the filling film. The DOF and processing margin of the photolithography process for forming the photoresist pattern can be improved because the photoresist film can have greatly reduced thickness due to the filling film.

Method for manufacturing a semiconductor device

A method for forming a minute pattern includes forming a mask layer on an object being patterned. The mask layer is patterned to form a first mask pattern having a first width larger than a predetermined width. The first mask pattern is thermally treated to form a second mask pattern having a second width smaller than the first width. A polymer layer is formed on the second mask pattern. The polymer layer reacts with the second mask pattern to form a hardened layer on a boundary surface between the polymer layer and the second mask pattern, thereby forming a third mask pattern having a third width substantially identical to the predetermined width. The limits of the present photolithography equipment are overcome. Also, a semiconductor device having a CD of below about 100 nm is manufactured.

Method for forming a minute pattern and method for manufacturing a semiconductor device using the same

A photoresist composition may include formulas 1 and 2: A method for forming photoresist patterns may include forming a photoresist layer on a semiconductor substrate and exposing and developing the photoresist layer using a mask pattern that includes first areas having a light transmissivity of about 100% and second areas having a light transmissivity of between about 10% and about 30%.

Photoresist composition and method of forming a photoresist pattern with a controlled remnant ratio

A method of forming the patterns of a semiconductor device uses a photomask employed therein is disclosed. In a semiconductor device having a first region where a plurality of first patterns are separated from each other by a first space and a plurality of second patterns having a larger size than that of the first patterns are separated from each other by a second space that is wider than the first space, the first and second regions being formed on the same layer, a fine gap for transmitting light is formed in a central portion of a mask pattern that corresponds to the second pattern on the photomask for patterning the first and second patterns to reduce the proximity effect. Lifting margin and bridge margin with respect to a pattern where the pattern pitch varies are improved through the use of the fine gap.

Method of forming a pattern of a semiconductor device and photomask therefor

A photoresist pattern is formed, without being exposed, by using photoresist having a residual layer proportion characteristic by which the photoresist dissolves at a suitable rate in a developing solution. First, a target layer to be patterned and a photoresist layer are sequentially formed on a substrate having a pattern that defines a step on the substrate. Some of the photoresist layer is treated with the developing solution, to thereby form a photoresist pattern whose upper surface is situated beneath the step and hence, exposes part of the target layer. Next, the exposed part of the target layer, and the photoresist pattern are removed. A silicidation process may be carried out thereafter on the area(s) from which the target layer has been removed. The method is relatively simple because it does not involve an exposure process. Furthermore, the method can be used to manufacture devices having very fine linewidths, i.e., a small design rule, because it is not subject to the misalignment errors which can occur during a conventional exposure process.

Method of forming a pattern using a photoresist without exposing the photoresist and silicidation method incorporating the same

A method of fabricating a flash memory device uses a self-aligned non-exposure pattern formation process. A conductive layer and an oxidation-blocking layer are formed on a stepped pattern including a floating gate pattern and an inter-gate insulating layer pattern such that the conductive layer and the oxidation-blocking layer conform to the stepped pattern. A photoresist layer is formed on the oxidation-blocking layer such that the photoresist layer has an upper surface situated above the oxidation-blocking layer. A portion of the photoresist layer is dissolved, without having photo-exposed the photoresist layer, by soaking the photoresist layer in developing solution. This soaking alone, or supplemented with an etch back process, is carried out until the upper surface of the photoresist layer is situated below the upper surface of the oxidation-blocking layer on the stepped pattern. The resulting photoresist pattern exposes that part of the oxidation-blocking layer on the stepped pattern. A blocking layer pattern exposing the conductive layer is formed on the stepped pattern by removing the exposed part of the oxidation-blocking layer. The photoresist pattern is then removed. A hard mask defining a control gate is formed by oxidizing the surface of the conductive layer exposed by the blocking layer pattern. The blocking layer pattern is then removed. A control gate is formed by etching the conductive layer using the hard mask as an etch mask. The hard mask is then removed whereupon a stacked gate structure is formed.

Method of fabricating flash memory device using self-aligned non-exposure pattern formation process

A method of forming fine patterns in a semiconductor device through a double photo lithography process. A layer to be etched and a hard mask layer are sequentially formed on a semiconductor substrate. A first photo resist pattern is formed on the hard mask layer. A first hard mask layer pattern is formed by etching the hard mask layer using the first photo resist pattern. After the first photo resist pattern is removed, a second photo resist pattern is formed on the resultant structure. A second hard mask layer pattern is formed by etching the first hard mask layer pattern using the second photo resist pattern. The layer to be etched is then etched using the second hard mask layer pattern after the second photo resist pattern has been removed, resulting in patterns have line edges without rounding.

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Gunpo-si, South Korea

Dae-youp Lee