Samsung Electronics Co., Ltd.

Dae-Seok Byeon

Young-Ho Lim

Dong-Hyuk Chae

Jin-Sung Park

Wook-Ghee Hahn

Sung-soo Lee

Hee-Won Lee

Pan-suk Kwak

Seung-Jae Lee

Sang-Wan Nam

Jong-Hwa Kim

Chi-Weon Yoon

Seung-Keun Lee

June Hyung Lee

Heung-Soo Im

Seung-Hyun Moon

Kyeong-Han Lee

Hae-Suk Shin

Wook-Ghee Han

Gyung-Han Lee

Myung-Jae Kim

A method of controlling the operation of a memory controller includes, in a read operation of a non-volatile memory device, the memory controller counting a selected read count of a selected string in a selected memory block and/or counting a non-selected read count of a non-selected string in the selected memory block. The memory controller performs a reclaim operation of the selected memory block when the selected read count and/or the non-selected read count exceeds a read threshold. To move data of the selected memory block to another memory block by the reclaim operation, the memory controller may copy the data of the selected memory block to another block by using a changed page address.

Memory controller having reclaim controller and method of controlling operation of the memory controller

A flash memory and a program method of the flash memory include applying a pass voltage to word lines to boost a channel voltage, which is discharged to a ground voltage. A program voltage is applied to a selected word line and a local voltage is applied to at least one word line supplied with the pass voltage while the program voltage is being applied to the selected word line. The local voltage is lower than the pass voltage and equal to or higher than the ground voltage. The boosted channel voltage may be discharged before the program voltage is applied to the selected word line.

Flash memory device and program method of flash memory device using different voltages

A method of operating a flash memory device includes a first operating mode and a second operating mode having different operating speeds. Each one of the first and second operating modes includes a bit line set-up interval and at least one additional interval. The flash memory is divided into first and second mats connected to respective first and second R/W circuits. During the bit line set-up interval of the second operating mode, the flash memory controls operation of both the first and second R/W circuits in a time division approach to stagger respective peak current intervals for the first and second mats.

Flash memory device operating at multiple speeds

Flash memory devices include a memory array having a plurality of NAND strings of EEPROM cells therein. A word line driver is provided to improve programming efficiency. The word line driver is electrically coupled to the memory array by a plurality of word lines. The word line driver includes a plurality of pass voltage switches. These switches have outputs electrically coupled by diodes to the plurality of word lines. Methods of programming flash memory devices include applying a pass voltage to a plurality of unselected word lines in a non-volatile memory array while simultaneously applying a sequentially ramped program voltage to a selected word line in the non-volatile memory array. The sequentially ramped program voltage has a minimum value that is clamped by a word line driver to a level not less than a value of the pass voltage.

Method of programming flash memory device

A method for reading status data from a multi-chip memory device including pluralities of memory chips is comprised of: providing a command to request an output of the status data to the plurality of memory chips; and accepting the status data of the plurality of memory chips through multiple channels of the multi-chip memory device. The reading method of the status data is helpful to shortening a standby time for accepting the status data of the multi-chip memory device, enhancing an operation rate.

Multi-chip package flash memory device and method for reading status data therefrom

A flash memory device is programmed by loading first data into a page buffer of a first mat. Second data is loaded into a page buffer of a second mat while programming the first data in a first memory block of the first mat.

Flash memory devices and methods of programming the same by overlapping programming operations for multiple mats

In a flash memory device, a high voltage generating circuit generates a high voltage and receives the high voltage as a switching voltage for controlling a voltage dividing circuit.

Flash memory device and related high voltage generating circuit

A method of programming a nonvolatile memory device using hybrid local boosting which includes a plurality of cell strings each having a plurality of electrically erasable and programmable memory cells connected in series and a plurality of wordlines respectively connected to control gates of the plurality of memory cells. The address of a selected cell that is to be programmed is received. A determination is made as to whether a selected wordline connected to the selected cell is located above or under a reference wordline based on the received address. The selected cell is programmed using local boosting when the selected wordline corresponds to the reference wordline or is located above the reference wordline. The selected cell is programmed using self-boosting when the selected wordline is located under the reference wordline. The programming method reduces circuit size of a nonvolatile memory device employing the programming method and efficiently prevents program disturbance due to charge sharing.

Method of programming a nonvolatile memory device using hybrid local boosting

In one aspect, a non-volatile NAND-flash semiconductor memory device is provided which is configured to execute at least one of a pre-program operation and a post-program operation before and after an erase operation, respectively. Each of the pre-program and post-program operations includes applying a program voltage to a subset of a plurality of word lines defining a word line block of the memory device.

Non-volatile memory device and erasing method thereof

A non-volatile memory device capable of stably setting its operating environment and a method of driving the non-volatile memory device are provided. The method includes providing power to the non-volatile memory device having a memory cell array that stores initial setting data for setting the operating environment of the non-volatile memory device. An initial read operation is performed on the memory cell array. The operating environment of the non-volatile memory device is set using the initial setting data that is read through the initial read operation. The initial setting data stored in the memory cell array includes main data having information about the operating environment to be set and an indicator corresponding to the main data for indicating a start and an end of the main data.

Non-volatile memory device and method of driving the same

A flash memory device is disclosed and includes; a memory cell array, a high voltage generating circuit generating a high voltage applied to a selected word line to select one or more memory cells in the memory cell array, and a controller. The controller cuts off a discharge path between the high voltage generating circuit and ground during a first period wherein the high voltage is not applied to a word line. The controller also deactivates the high voltage generating circuit during this first period.

A method for programming multi-level non-volatile memory. A plurality of multi-bit storage cells capable of storing different levels of charge usable to represent data represented by a least significant bits (LSBs) and a most significant bits (MSBs) are programmed first with LSBs and then with MSBs. The programmed storage cells have a threshold voltage lower than a voltage VRto store a first value, greater than VRand lower than a voltage VRto store a second value, and greater than VRand lower than a voltage VRto store a third value. Each of the cells has a threshold voltage greater than a voltage VRwhen it is desired that the storage cell store a fourth value. VRis less than VRwhich is less than VR. The flag cell is programmed to have a threshold voltage greater than VRto indicate that the MSBs have been programmed.

Growing community of inventors

Yongin-si, South Korea

Dae-Seok Byeon