Samsung Electro-mechanics Co., Ltd.

Samsung Electronics Co., Ltd.

Dae Hyun Park

Han Bit Kim

Mi Ja Han

Jung Ho Shim

Seong Hee Choi

Kang Heon Hur

Young Gwan Ko

Sang Jong Lee

Hyung Joon Kim

Jae Hyun Lim

Eun Jung Jo

Chul Kyu Kim

Seung Eun Lee

Doo Hwan Lee

Yul Kyo Chung

Sung Won Jeong

Moon Il Kim

Yee Na Shin

Yoon Seok Seo

Seong Hwan Lee

Sung Hyo Jeong

Chui Kyu Kim

A semiconductor package includes a frame having a through-hole, and a first semiconductor chip disposed in the through-hole of the frame and having an active surface on which a connection pad is disposed, an inactive surface opposing the active surface, and a side surface connecting the active and inactive surfaces. A first encapsulant covers at least a portion of each of the inactive surface and the side surface of the first semiconductor chip. A connection structure has a first surface having disposed thereon the active surface of the first semiconductor chip, and includes a redistribution layer electrically connected to the connection pad of the first semiconductor chip. A first passive component is disposed on a second surface of the connection structure opposing the first surface, the first passive component being electrically connected to the redistribution layer and having a thickness greater than a thickness of the first semiconductor chip.

Semiconductor package

A semiconductor package includes: a frame having a first surface and a second surface opposing each other, and including a through-hole and a wiring structure connected to the first surface and the second surface; a connection structure disposed on the first surface of the frame and including a redistribution layer; a semiconductor chip disposed in the through-hole and including connection pads connected to the redistribution layer; an encapsulant encapsulating the semiconductor chip and covering the second surface of the frame; and a plurality of electrical connection metal members disposed on the second surface of the frame and connected to the wiring structure. The wiring structure includes a shielding wiring structure surrounding the through-hole, and the plurality of electrical connection metal members include a plurality of grounding electrical connection metal members connected to the shielding wiring structure.

Semiconductor package having through-hole including shielding wiring structure

A fan-out semiconductor package includes a connection member including an insulating layer and a redistribution layer, a semiconductor chip disposed on the connection member, an encapsulant encapsulating the semiconductor chip, and an electromagnetic wave shielding layer disposed on the semiconductor chip and including a plurality of degassing holes. The electromagnetic wave shielding layer includes a first region and a second region in which densities of the degassing holes are different from each other, the first region having a density of the degassing holes higher than a density of the degassing holes in the second region.

Fan-out semiconductor package

A circuit board includes a first conductive layer, a second conductive layer, and a first insulating layer disposed between the first conductive layer and the second conductive layer, wherein the first conductive layer includes a signal line, the second conductive layer includes a ground line, and the ground line of the second conductive layer includes a pattern area patterned in a meander shape.

Circuit board and conductive pattern structure

A fan-out semiconductor package includes a first connection member having a through-hole, first and second semiconductor chips disposed in the through-hole, an encapsulant encapsulating at least portions of the first connection member, the first semiconductor chip, and the second semiconductor chip, and a second connection member disposed on the first connection member and on active surfaces of the first semiconductor chip and the second semiconductor chip. A redistribution layer of the second connection member is respectively connected to both the first and second connection pads through first and second conductors, and the second conductor has a height greater than that of the first conductor.

The present disclosure relates to a fan-out semiconductor package in which a plurality of semiconductor chips are stacked and packaged, and are disposed in a special form to be thus electrically connected to a redistribution layer of a connection member through vias rather than wires. The fan-out semiconductor package can further include a connection member having a through-hole, and at least one of the semiconductor chips can be disposed in the through-hole.

A printed circuit board and a printed circuit board includes a signal transmitting part; a ground part that includes an impedance adjusting part and a dummy part; and an insulating layer disposed between the signal transmitting part and the ground part.

Printed circuit board and printed circuit board for camera module

A fan-out semiconductor package includes: a first interconnection member having a through-hole; a first semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface; a first encapsulant encapsulating at least portions of the first interconnection member and the first semiconductor chip; a second interconnection member disposed on the first interconnection member and the first semiconductor chip; a second semiconductor chip disposed on the first encapsulant and having an active surface having connection pads disposed thereon; and a second encapsulant encapsulating at least portions of the second semiconductor chip. The first interconnection member and the second interconnection member include, respectively, redistribution layers electrically connected to the connection pads of the first semiconductor chip, and the connection pads of the second semiconductor chip are electrically connected to the redistribution layer of the first interconnection member by wires.

The present disclosure relates to a fan-out semiconductor package and a method of manufacturing the same. The fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole; an encapsulant encapsulating at least portions of the first connection member and the semiconductor chip; and a second connection member disposed on the first connection member and the semiconductor chip. The first connection member includes a first insulating layer, a first redistribution layer and a second redistribution layer disposed on one surface and the other surface of the first insulating layer opposing the one surface thereof, respectively, a second insulating layer disposed on the first insulating layer and covering the first redistribution layer, and a third redistribution layer disposed on the second insulating layer. A fan-out semiconductor package may include one or more connection units instead of the first connection member.

Fan-out semiconductor package and method of manufacturing the same

An electronic component package and a method of manufacturing the same are provided. The electronic component package includes a frame having a through-hole, an electronic component disposed in the through-hole of the frame, and a redistribution part disposed at one side of the frame and the electronic component. One or more first wiring layers of the frame are electrically connected to the electronic component through the redistribution part.

Electronic component package and method of manufacturing the same

A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole of the first connection member and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the inactive surface of the semiconductor chip; and a second connection member disposed on the first connection member and the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pads. The first connection member includes a first electromagnetic interference (EMI) blocking part surrounding side surfaces of the semiconductor chip, the second connection member includes a second EMI blocking part surrounding the redistribution layer, and the first EMI blocking part and the second EMI blocking part are connected to each other.

Growing community of inventors

Suwon-si, South Korea

Dae Hyun Park