International Business Machines Corporation

Ultratech, Inc.

Globalfoundries Inc.

Invensas LLC

Da-Yuan Shih

Paul Alfred Lauro

Keith E Fogel

Brian Samuel Beaman

Peter Alfred Gruber

Maurice Heathcote Norcott

Stephen L Buchwalter

Jae-Woong Nah

George Frederick Walker

Sung Kwon Kang

Yun-Hsin Liao

Bruce Kenneth Furman

Donald W Henderson

James L Hedrick

Daniel Peter Morris

Ajay Prabhakar Giri

Casimer M DeCusatis

Michael A Gaynes

Fuad Elias Doany

Kamalesh K Srivastava

Henry Atkinson Nye, Iii

Stephen James Kilpatrick

Jae-woong Nah

Madhusudan K Iyengar

Roger R Schmidt

Robert Dennis Miller

Mukta G Farooq

Evan G Colgan

Lawrence Jacobowitz

Hilton T Toy

Minhua Lu

Jeffrey Curtis Hedrick

David L Edwards

Donna S Zupanski-Nielsen

Balaram Ghosal

Luc L Belanger

Walter F Lange

Michael J Ellsworth, Jr

John Ulrich Knickerbocker

Robert E Simons

Richard C Chu

Levi A Campbell

Christian Lavoie

Eugene John O'Sullivan

Gareth Geoffrey Hougham

Lawrence Shungwei Mok

Katsuyuki Sakuma

Leathen Shi

Claudius Feger

Brian Richard Sundlof

Roy Arthur Carruthers

S Jay Chey

David Hirsch Danovitch

Alphonso Philip Lanzetta

John J Ritsko

Leena Paivikki Buchwalter

Jonathan H Griffith

Michael J Sullivan

Jungihl Kim

James L Hedrick, Jr

Eric H Laine

William J Tkazyik

Paul H Palmateer

Valérie Anne Oberson

Thomas J Dudek

Yoon-Chul Son

Theodore Gerard Van Kessel

Ping-Chuan Wang

Bing Dang

Russell Alan Budd

Yves Corfield Martin

Marc Adam Bergendahl

Carlos Juan Sambucetti

Ho-Ming Tong

Frank Louis Pompeo

Charles Hampton Perry

Steven G Barbee

Steven Paul Ostrander

Peter James Lindgren

Glenn Graham Daves

Yu-Ting Cheng

Birendra N Agarwala

Rudolf Adriaan Haring

Karl J Puttlitz, Sr

Stefanie Ruth Chiras

Jae M Park

Sheree H Wen

Charles C Goldsmith

Valerie A Oberson

Hung-Chang W Huang

Wei Zou

Warren D Grobman

Juan Ayala-Esquilin

William S Graham

Timothy A Gosselin

Timothy W Carr

Anthony F Arnold

Derry J Dubetsky

Richard F Levine

Carl P Hayunga

Apparatus and methods are disclosed for transferring solder to a substrate. A substrate belt moves one or more substrates in a belt direction. A decal has one or more through holes in a hole pattern that hold solder. Each of the solder holes can align with respective locations on one of the substrates. An ultrasonic head produces an ultrasonic vibration in the solder in a longitudinal direction perpendicular to the belt direction. The ultrasonic head and substrate can be moved together in the longitudinal direction to maintain the ultrasonic head in contact with the solder while the ultrasonic head applies the ultrasonic vibration. Various methods are disclosed including methods of transferring the solder with or without external heating.

Ultrasonic-assisted solder transfer

Protruding solder structures are created for electrical attachment of semiconductor devices. A rigid mold having one or more mold openings is attached to and used in combination with a decal structure that has one or more decal holes. The decal structure is disposed on the rigid mold so that the decal openings are aligned over the mold openings. Each of the decal hole and mold opening in contact form a single combined volume. The single combined volumes are filled with solder to form protruding solder structures. Various structures and methods of making and using the structures are disclosed.

Combination polyimide decal with a rigid mold

In an Injection Molded Soldering system, a single, one-layer decal has one or more through hole patterns where each through hole pattern has a plurality of through holes through the decal. A drum with a drum circumference turns while the decal is forced to be adjacent to the drum circumference. The decal passes by a tangent point on the drum circumference where one or more solder-filled through hole patterns align with recessed openings on a substrate at the tangent point of the drum circumference. Applied heat causes the solder structures to melt and flow into the recessed openings.

Continuous solder transfer to substrates

A wafer-scale apparatus and method is described for the automation of forming, aligning and attaching two-dimensional arrays of microoptic elements on semiconductor and other image display devices, backplanes, optoelectronic boards, and integrated optical systems. In an ordered fabrication sequence, a mold plate comprised of optically designed cavities is formed by reactive ion etching or alternative processes, optionally coated with a release material layer and filled with optically specified materials by an automated fluid-injection and defect-inspection subsystem. Optical alignment fiducials guide the disclosed transfer and attachment processes to achieve specified tolerances between the microoptic elements and corresponding optoelectronic devices and circuits. The present invention applies to spectral filters, waveguides, fiber-optic mode-transformers, diffraction gratings, refractive lenses, diffractive lens/Fresnel zone plates, reflectors, and to combinations of elements and devices, including microelectromechanical systems and liquid crystal device matrices for adaptive, tunable elements. Preparation of interfacial layer properties and attachment process embodiments are taught.

Injection molded microoptics

A wafer-scale apparatus and method is described for the automation of forming, aligning and attaching two-dimensional arrays of microoptic elements on semiconductor and other image display devices, backplanes, optoelectronic boards, and integrated optical systems. In an ordered fabrication sequence, a mold plate comprised of optically designed cavities is formed by reactive ion etching or alternative processes, optionally coated with a release material layer and filled with optically specified materials by an automated fluid-injection and defect-inspection subsystem. Optical alignment fiducials guide the disclosed transfer and attachment processes to achieve specified tolerances between the microoptic elements and corresponding optoelectronic devices and circuits. The present invention applies to spectral filters, waveguides, fiber-optic mode-transformers, diffraction gratings, refractive lenses, diffractive lens/Fresnel zone plates, reflectors, and to combinations of elements and devices, including microelectromechanical systems (MEMS) and liquid crystal device (LCD) matrices for adaptive, tunable elements. Preparation of interfacial layer properties and attachment process embodiments are taught.

A method of forming a reduced volume interconnect for a chip stack including multiple silicon layers, the method including: forming multiple conductive structures, each of at least a subset of the conductive structures having a volume of conductive material for a corresponding under bump metallurgy pad onto which the conductive structure is transferred that is configured such that a ratio of an unreflowed diameter of the conductive structure to a diameter of the corresponding pad is about one third-to-one or less; transferring the conductive structures to the silicon layers; stacking the silicon layers in a substantially vertical dimension such that each of the conductive structures on a given silicon layer is aligned with a corresponding electrical contact location on an underside of an adjacent silicon layer; and heating the interconnect so as to metallurgically bond multiple electrical contact locations of adjacent silicon layers.

Reduced volume interconnect for three-dimensional chip stack

Coaxial probe structures include a plurality of discrete insulated elongated electrical conductors projecting from a support surface which are useful as probes for testing of electrical interconnections to electronic devices, such as integrated circuit devices and other electronic components and particularly for testing of integrated circuit devices with rigid interconnection pads and multi-chip module packages with high density interconnection pads. Coaxial probe structures are fabricated by the methods described providing a high density coaxial probe.

Coaxial probe structure of elongated electrical conductors projecting from  a support structure

A preassembly semiconductor device comprises chip soldering structures on a semiconductor chip and substrate soldering structures on a substrate corresponding to the chip soldering structures. The substrate soldering structures extend toward the chip soldering structures for forming solder connections with the chip soldering structures. The chip and the substrate are in preassembly positions relative to one another. The height of the substrate soldering structures is greater than the height of the chip soldering structures. A pre-applied underfill is contiguous with the substrate and is sufficiently thick so as to extend substantially no further than the full height of the substrate soldering structures. In another embodiment the height of the chip soldering structures is greater than the height of the substrate soldering structures and the pre-applied underfill is contiguous with the semiconductor chip and sufficiently thick so as to extend substantially no further than the full height of the chip soldering structures. A process comprises manufacturing semiconductor assemblies from these devices by soldering the chip and the substrate to one another.

No flow underfill or wafer level underfill and solder columns

A preassembly semiconductor device comprises chip soldering structures on a semiconductor chip and substrate soldering structures on a substrate corresponding to the chip soldering structures. The substrate soldering structures extend toward the chip soldering structures for forming solder connections with the chip soldering structures. The chip and the substrate are in preassembly positions relative to one another. The height of the substrate soldering structures is greater than the height of the chip soldering structures. A pre-applied underfill is contiguous with the substrate and is sufficiently thick so as to extend substantially no further than the full height of the substrate soldering structures. In another embodiment the height of the chip soldering structures is greater than the height of the substrate soldering structures and the pre-applied underfill is contiguous with the semiconductor chip and sufficiently thick so as to extend substantially no further than the full height of the chip soldering structures. A process comprises manufacturing semiconductor assemblies from these devices by soldering the chip and the substrate to one another

A method of assembling a semiconductor flip chip comprising a wafer having solderable electrical conducting sites and a substrate having electrical connecting pads and electrically conductive posts operatively associated with the pads and extending away from the pads to terminate in distal ends, comprises the pre-assembly steps of solder bumping the distal ends through openings in a solder mask by injection molding solder onto the distal ends so that the distal ends extend into the mask through the openings to produce a solder bumped substrate, and soldering the solder bumped substrate to the sites.

Copper post solder bumps on substrates

A process comprises manufacturing an electromigration-resistant under-bump metallization (UBM) flip chip structure comprising a Cu layer by applying to the Cu layer a metallic reaction barrier layer comprising NiFe. The solder employed in the flip chip structure comprise substantially lead-free tin. A structure comprises a product produced by this process. In another embodiment a process comprises manufacturing an electromigration-resistant UBM Sn-rich Pb-free solder bump flip chip structure wherein the electromigration-resistant UBM structure comprises a four-layer structure, or a three-layer structure, wherein the four layer structure is formed by providing 1) an adhesion layer, 2) a Cu seed layer for plating, 3) a reaction barrier layer, and 4) a wettable layer for joining to the solder, and the three-layer structure is formed by providing 1) an adhesion layer, 2) a reaction barrier layer, and 3) a wettable layer. In a further embodiment, the reaction barrier layer comprises metals selected from Ni, Fe, Pd, Pt, Co, Cu and their alloys, and combinations thereof. A structure comprises a product produced by the immediately foregoing process.

Electromigration-resistant under-bump metallization of nickel-iron alloys for Sn-rich solder bumps in Pb-free flip-clip

A method comprises forming semiconductor flip chip interconnects having electrical connecting pads and electrically conductive posts terminating in distal ends operatively associated with the pads. We solder bump the distal ends by injection molding, mask the posts on the pads with a mask having a plurality of through hole reservoirs and align the reservoirs in the mask to be substantially concentric with the distal ends. Injecting liquid solder into the reservoirs and allowing it to cool provides solidified solder on the distal ends, which after mask removal produces a solder bumped substrate which we position on a wafer to leave a gap between the wafer and the substrate. The wafer has electrically conductive sites on the surface for soldering to the posts. Abutting the sites and the solder bumped posts followed by heating joins the wafer and substrate. The gap is optionally filled with a material comprising an underfill.

A preassembly semiconductor device comprises substrate soldering structures extending toward chip soldering structures for forming solder connections with the chip soldering structures, i.e., the chip and the substrate are in preassembly positions relative to one another. The height of the substrate soldering structures is greater than the height of the chip soldering structures. A pre-applied underfill is contiguous with the substrate and is sufficiently thick so as to extend substantially no further than the full height of the substrate soldering structures. In another embodiment the height of the chip soldering structures is greater than the height of the substrate soldering structures and the pre-applied underfill is contiguous with the semiconductor chip and sufficiently thick so as to extend substantially no further than the full height of the chip soldering structures. A process comprises manufacturing semiconductor assemblies from these devices by soldering the semiconductor chip and the substrate to one another.

Growing community of inventors

Poughkeepsie, NY, United States of America

Da-Yuan Shih