Fairchild Semiconductor Corporation

Connie Tangpuz

Rajeev Dinkar Joshi

Honorio T Granada, Jr

Romel Nogas Manatad

Jonathan A Noquil

Venkat Iyer

Stephen Martin

A semiconductor die package is disclosed. It may include a semiconductor die having a first surface and a second surface, and a leadframe structure. A molding material may be formed around at least a portion of the die and at least a portion of the leadframe structure. A solderable layer may be on the exterior surface of the molding material and the first surface of the semiconductor die.

Method to manufacture a universal footprint for a package with exposed chip

A chip device that includes a leadframe that has a die attach cavity. The memory device further includes a die that is placed within the die attach cavity. The die attach cavity is substantially the same thickness as the die. The die is positioned within the cavity and is attached therein with a standard die attachment procedure.

Flip chip substrate design

Growing community of inventors

Lapu-Lapu, Philippines

Connie Tangpuz