Vanguard International Semiconductor Corporation

Chung-Te Chou

Chih-Cherng Liao

Ya-Han Liang

Chih-Wei Lin

Chia-Hao Lee

Manoj Kumar

Ching-Yi Hsu

Pi-Kuang Chuang

Yun-Chou Wei

Wen-Chung Chen

Yung-Lung Chou

Che-Hua Chang

Cheng-Lun Cho

A method for fabricating a semiconductor structure includes providing a substrate. The method further includes implanting the substrate to form a high-voltage well region having a first conductivity type. The method further includes forming a pair of drain drift regions in the high-voltage well region. The pair of drain drift regions are on the front side of the substrate, and the pair of drain drift regions have a second conductivity type opposite to the first conductivity type. The method further includes forming a gate electrode embedded in the high-voltage well region. The gate electrode is positioned between the pair of drain drift regions and laterally spaced apart from the pair of drain drift regions.

Semiconductor structure having a high voltage well region

A high voltage (HV) semiconductor device includes: a semiconductor substrate having a first conductivity type; a gate structure disposed over a portion of the semiconductor substrate; a pair of spacers respectively disposed over a sidewall of the gate structure, wherein one of the spacers is a composite spacer comprising a first insulating spacer contacting the gate structure, a dummy gate structure, and a second insulating spacer; a first drift region disposed in a portion of the semiconductor, underlying a portion of the gate structure and one of the pair of spacers, having a second conductivity type opposite to the first conductivity type; and a pair of doping regions, respectively disposed in a portion of the semiconductor substrate on opposite sides of the gate structure, wherein the pair of doping regions include the second conductivity type and one of the doping regions is disposed in the first drift region.

High voltage semiconductor device and method for fabricating the same

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Chung-Te Chou