International Business Machines Corporation

Chung-Ping Eng

Yun-Yu Wang

Richard Anthony Conti

Tina Jane Wagner

Matthew C Nicholls

Cyril Cabral, Jr

Christian Lavoie

Kirk David Peterson

Kwong Hon Wong

William Joseph Murphy

Anthony Gene Domenicucci

Terence Lawrence Kane

Lynne Marie Gignac

Brett H Engel

Patricia A O'Neil

Keith K Wong

John Charles Petrus

Barry Jack Ginsberg

Dermott A Macpherson

A cap nitride stack which prevents etch penetration to the HDP nitride while maintaining the electromigration benefits of HDP nitride atop Cu. In one embodiment, the stack comprises a first layer of HDP nitride and a second layer of a Si&#x2014;C&#x2014;H compound disposed over the first layer. The Si&#x2014;C&#x2014;H compound is for example BLoK, or N-BLoK (Si&#x2014;C&#x2014;H&#x2014;N), and is selected from a group of materials that has high selectivity during via RIE such that RIE chemistry from the next wiring level does not punch through. Carbon and nitrogen are the key elements. In another embodiment, the stack comprises a first layer of HDP nitride, followed by a second layer of UVN (a plasma nitride), and a third layer comprising HDP nitride disposed over the second layer.

HDP-based ILD capping layer

Methods of etching a semiconductor structure using ion milling with a variable-position endpoint detector to unlayer multiple interconnect layers, including low-k dielectric films. The ion milling process is controlled for each material type to maintain a planar surface with minimal damage to the exposed materials. In so doing, an ion beam mills a first layer and detects an endpoint thereof using an optical detector positioned within the ion beam adjacent the first layer to expose a second layer of low-k dielectric film. Once the low-k dielectric film is exposed, a portion of the low-k dielectric film may be removed to provide spaces therein, which are backfilled with a material and polished to remove the backfill material and a layer of the multiple interconnect metal layers. Still further, the exposed low-k dielectric film may then be removed, and the exposed metal vias polished.

Method of reworking structures incorporating low-k dielectric materials

A method for forming a TiN layer on top of a metal silicide layer in a semiconductor structure without the formation of a thick amorphous layer containing Ti, Co and Si and the structure formed are provided. In the method, after a Ti layer is deposited on top of a metal silidide layer, a dual-step annealing process is conducted in which a low temperature annealing in a forming gas (or ammonia) at a temperature not higher than 500&deg; C. is first conducted for less than 2 hours followed by a high temperature annealing in a nitrogen-containing gas (or ammonia) at a second temperature not lower than 500&deg; for less than 2 hours to form the TiN layer. The present invention method prevents the problem usually caused by a thick amorphous material layer of Ti&mdash;Si&mdash;Co which produces weakly bonded Ti which reacts with fluorine atoms from WF during a subsequent CVD W deposition process and causes liner failure due to a volume expansion of the amorphous material. The maximum thickness of the amorphous material layer formed by the present invention method is less than 5 nm which minimizes the line failure problem.

Method for forming a TiN layer on top of a metal silicide layer in a semiconductor structure and structure formed

A method of fabricating a Ti-containing liner having good contact resistance and coverage of a contact hole is provided. The method which converts an amorphous region of ionized metal plasma deposited Ti into a substantially crystalline region includes (a) providing a structure having at least one contact hole formed therein, said at least one contact hole exposing at least a portion of a cobalt disilicide contact formed in a semiconductor substrate; (b) depositing a Ti/TiN liner in said at least one contact hole by ionized metal plasma deposition; (c) annealing said Ti/TiN liner under conditions effective to recrystallize any amorphous region formed during said annealing into a crystalline region including a TiSi top layer and a CoSi bottom layer; and (d) optionally forming a conductive material on said Ti/TiN liner.

Conversion of amorphous layer produced during IMP Ti deposition

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Hopewell Junction, NY, United States of America

Chung-Ping Eng