Taiwan Semiconductor Manufacturing Comp. Ltd.

Chung-Jen Chen

Cheng-Ming Wu

Po-Tao Chu

Wei-Jen Wu

Kun-Pi Cheng

Hsin-Yuan Chen

Chin-Kun Fang

Ching-Jiunn Huang

Tai-Ming Yang

A semiconductor process wafer having substantially co-planar active areas and a laser marked area in an adjacent inactive area and method for forming the same to eliminate a step height and improve a subsequent patterning process over the active areas wherein an inactive area trench is formed overlying the laser marked area in parallel with formation of STI trenches in the active area whereby the active areas and the inactive area are formed substantially co-planar without a step height.

Method to avoid a laser marked area step height

Removing photoresist from alignment marks on a semiconductor wafer using a wafer edge exposure process is disclosed. The alignment marks on the wafer are covered by photoresist used in conjunction with semiconductor processing of one or more layers deposited on the semiconductor wafer. One or more parts of the edge of the wafer are exposed to remove the photoresist from these parts and thus reveal alignment marks on the wafer. The exposure of the one or more parts of the wafer is accomplished without performing a photolithographic clear out process. Rather, a wafer edge exposure (WEE) process is inventively utilized. Once the WEE process is performed, subsequent layers may be deposited by aligning them using the revealed alignment marks.

Photoresist removal from alignment marks through wafer edge exposure

Growing community of inventors

Tainan, Taiwan

Chung-Jen Chen