United Microelectronics Corp.

Chun-Lin Chen

Chih-Chung Wang

Wen-Fang Lee

Sheng-Chen Chung

Chiu-Te Lee

Nien-Chung Li

Ching-Chung Yang

Min-Chuan Tsai

Chun-Tsen Lu

Wei-Chuan Tsai

Chin-Chia Kuo

Ming-Hua Tsai

Kuo-Chin Hung

Chen-An Kuo

Jui-Ming Yang

Jung Han

Liang-An Huang

Yuan-Cheng Yang

Kun Ju Li

Hsin Jung Liu

Yi Han Liao

Yi-Han Su

An extended drain metal oxide semiconductor transistor includes a substrate. A gate is disposed on the substrate. A source doped region is disposed in the substrate at one side of the gate. A drain doped region is disposed in the substrate at another side of the gate. A thin gate dielectric layer is disposed under the gate. A thick gate dielectric layer is disposed under the gate. The thick gate dielectric layer extends from the bottom of the gate to contact the drain doped region. A second conductive type first well is disposed in the substrate and surrounds the source doped region and the drain doped region. A deep well is disposed within the substrate and surrounds the second conductive type first well.

EDMOS and fabricating method of the same

A gate oxide forming process includes the following steps. A substrate including a first area and a second area is provided. A first oxide layer, a silicon containing cap layer and a second oxide layer on the substrate of the first area and the second area are sequentially and blanketly formed. The silicon containing cap layer and the second oxide layer in the first area are removed. An oxidation process is performed to oxidize the silicon containing cap layer and a gate oxide layer is formed in the second area.

Gate oxide forming process

A method of manufacturing a semiconductor structure, comprising: providing a preliminary structure having a first region and a second region and comprising a plurality of first trenches in the first region; forming a metal layer filling the first trenches covering on the preliminary structure, wherein the metal layer comprises a concave portion in the second region and the concave portion defines an opening; forming a metal nitride layer on the metal layer by an nitride treatment; and performing a planarization process to remove the metal nitride layer and a portion of the metal layer to expose the preliminary structure.

Fabricating method of semiconductor structure

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Tainan, Taiwan

Chun-Lin Chen