Advanced Chip Engineering Technology, Inc.

Advanced Clip Engineering Technology Inc.

Chun-Hui Yu

Wen-Kun Yang

Dyi-Chung Hu

Chih-Wei Lin

Chin-Chen Yang

Wen-Bin Sun

Chao-Nan Chou

His-Ying Yuan

Chihwei Lin

Kuang-Chi Chao

Cheng-hsien Chiu

Ching-Shun Huang

The present invention discloses a structure of package comprising: a substrate with a die receiving through hole; a base attached on a lower surface of the substrate; a die disposed within the die receiving through hole and attached on the base; a dielectric layer formed on the die and the substrate; a re-distribution layer (RDL) formed on the dielectric layer and coupled to the die; a protection layer formed over the RDL; and pluralities of pads formed on the protection layer and coupled to the RDL. The RDL is made from an alloy comprising Ti/Cu/Au alloy or Ti/Cu/Ni/Au alloy.

RF module package for releasing stress

The present invention discloses a structure of package comprising: a substrate with a die receiving through hole and a contact conductive via formed therein, a die disposed within the die receiving through hole, a surrounding material filled in the gap except the die area of the die receiving though hole, a re-distribution layer formed on the substrate and coupled to the contact conductive via, a protection layer formed over the re-distribution layer, a cover material formed over the protection layer; and a terminal contact pad formed on the lower surface of the substrate and under the contact conductive via and the die to couple the contact conductive via.

System-in-package and manufacturing method of the same

The present invention provides a structure of elastic dielectric layers with certain through holes adjacent to the angle of a RDL of WLP to absorb the stress. The elastic dielectric layer is made from silicone based materials with specific range of CTE, elongation rate and hardness, which can improve the mechanical reliability of the structure during temperature cycling test. The CTE difference between the RDL and the elastic dielectric material still may cause the elastic dielectric layer crack; to solve this problem, The present invention further provides a structure of dielectric layers with certain open through holes adjacent to the curve portion of a RDL of WLP which can reduce the stress accumulated at area of the dielectric layer adjacent to the RDL/dielectric layer interface to solve the crack problem of the dielectric layer.

Structure of dielectric layers in built-up layers of wafer level package

A filling paste structure and process of wafer level package is disclosed. The process comprises filling an adhesive material to fill among plurality of dice and cover the plurality of dice. The pluralities of dice are adhered to glue pattern with viscosity in common state formed on a removable substrate. A rigid substrate is coated by adhesive material to adhere the dice. Then, pluralities of dice are departed from the glue pattern by a special environment after attaching the rigid base substrate.

Packaging structure with coplanar filling paste and dice and with patterned glue for WL-CSP

Growing community of inventors

Tainan, Taiwan

Chun-Hui Yu