Taiwan Semiconductor Manufacturing Comp. Ltd.

Tsinghua University

Chun-Hsiang Fan

Yu-Lien Huang

Kuo-Bin Huang

Tung Ying Lee

Ming-Hsi Yeh

Ming-Huan Tsai

Yung-Ta Li

Chi-Wen Liu

Tsu-Hui Su

Clement Hsingjen Wann

Yu-Wen Wang

Chi-Kang Liu

Tsu-Hsiu Perng

Chun-Liang Tai

Chun-Hsiung Lin

Mao-Lin Huang

Ssu-Yu Liao

Sai-Hooi Yeong

Tung-Ying Lee

Neng-Kuo Chen

Wei-Yuan Lu

Yu-Lin Yang

Wei-Han Fan

Ta-Wei Lin

Sheng-Wen Yu

Pei-Yi Lin

Kun-Yen Lu

Chieh-Chun Chiang

Wang-Hua Lin

Zhiqiang Wu

Chien-Hong Cheng

Chun-Fu Cheng

Kuo-An Liu

Meng-Yu Lin

Zhao-Cheng Chen

Kai Tak Lam

Shih-Hsiang Chiu

Han-Yeou Huang

Fin and nanostructured channel structure formation techniques for three-dimensional transistors can tune device performance. For example, fin profile control can be achieved by modifying the shape of fins/nanostructured channel structures so as to reduce their line edge roughness. Consequently, current flow within the channel regions of fins and nanostructured channel structures can be improved, enhancing device performance.

Fin shape modification

A method for forming a semiconductor device structure is provided. The method includes providing a substrate, a fin, and a semiconductor layer. The fin is over the substrate, the semiconductor layer is over the fin, the substrate and the fin are made of different materials, and the fin and the semiconductor layer are made of different materials. The method includes forming a dielectric layer over the semiconductor layer and the fin. The method includes forming a semiconductor structure over a sidewall of the dielectric layer. The method includes removing a first top portion of the dielectric layer over a top surface of the semiconductor layer. The method includes forming a gate over the semiconductor layer, the dielectric layer, and the semiconductor structure.

Semiconductor device structure with fin and method for forming the same

A method of manufacturing a semiconductor device is provided. The method comprises the following steps of forming a first semiconductor layer over a substrate, the first semiconductor layer comprising a first semiconductor material; etching the first semiconductor layer to form a first recess; forming a second semiconductor layer in the first recess, the second semiconductor layer comprising a second semiconductor material different from the first semiconductor material; etching the first semiconductor layer and the second semiconductor layer to form a first fin comprising the second semiconductor layer and the first semiconductor layer; forming an insulation material over the substrate, wherein a top surface of the insulation material is flush with a top surface of the first fin; performing an implantation process on the first fin to form an implant region near the top surface of the first fin; and partially removing the insulation material to form shallow trench isolation regions, wherein the first fin is sandwiched by two adjacent shallow trench isolation regions.

Semiconductor device and manufacturing method thereof

Methods for improving profiles of channel regions in semiconductor devices and semiconductor devices formed by the same are disclosed. In an embodiment, a method includes forming a semiconductor fin over a semiconductor substrate, the semiconductor fin including germanium, a germanium concentration of a first portion of the semiconductor fin being greater than a germanium concentration of a second portion of the semiconductor fin, a first distance between the first portion and a major surface of the semiconductor substrate being less than a second distance between the second portion and the major surface of the semiconductor substrate; and trimming the semiconductor fin, the first portion of the semiconductor fin being trimmed at a greater rate than the second portion of the semiconductor fin.

Semiconductor device and method

A method includes forming isolation regions extending into a semiconductor substrate. A semiconductor strip is between the isolation regions. The method further includes recessing the isolation regions so that a top portion of the semiconductor strip protrudes higher than top surfaces of the isolation regions to form a semiconductor fin, measuring a fin width of the semiconductor fin, generating an etch recipe based on the fin width, and performing a thinning process on the semiconductor fin using the etching recipe.

Controlling fin-thinning through feedback

A method for cleaning a semiconductor wafer is provided. The method includes placing a semiconductor wafer over a supporter arranged around a central axis of a spin base. The method further includes securing the semiconductor wafer using a clamping member positioned on the supporter. The movement of the semiconductor wafer during the placement of the semiconductor wafer over the supporter is guided by a guiding member located over the clamping member. The method also includes spinning the semiconductor wafer by rotating the spin base about the central axis. In addition, the method includes dispensing a processing liquid over the semiconductor wafer.

Method for cleaning semiconductor wafer

A method includes cleaning a wafer with a brush element where the brush element collects particles from the wafer during the cleaning process. The brush element is immersed in a first cleaning liquid. An ultrasonic or megasonic vibration is applied to the first cleaning liquid. The ultrasonic or megasonic vibration causes the particles to dislodge from the brush element into the first cleaning liquid. The particles contaminate the first cleaning liquid.

Sonic cleaning of brush

A semiconductor device includes a fin feature in a substrate, a stack of semiconductor layers over the fin feature. Each of the semiconductor layers does not contact each other. The device also includes a semiconductor oxide layer interposed between the fin feature and the stack of the semiconductor layers. A surface of the semiconductor oxide layer contacts the fin feature and an opposite surface of the semiconductor oxide layer contacts a bottom layer of the stack of semiconductor layers. The device also includes a conductive material layer encircling each of the semiconductor layers and filling in spaces between each of two semiconductor layers.

Structure of S/D contact and method of making same

A method of processing a semiconductor substrate is provided. The semiconductor substrate may be placed on a spin chuck with a plurality of holding members, each holding member including a pin having a sloped portion to provide a gap between an upper edge of the substrate and the pin. Thereafter, one or more treatment fluids may be dispensed over the substrate.

Substrate vapor drying apparatus and method

FETs and methods for forming FETs are disclosed. A structure comprises a substrate, a gate dielectric and a gate electrode. The substrate comprises a fin, and the fin comprises an epitaxial channel region. The epitaxial channel has a major surface portion of an exterior surface. The major surface portion comprising at least one lattice shift, and the at least one lattice shift comprises an inward or outward shift relative to a center of the fin. The gate dielectric is on the major surface portion of the exterior surface. The gate electrode is on the gate dielectric.

FETs and methods for forming the same

A method includes providing a structure having a substrate and a fin extending from the substrate, wherein the fin includes a first semiconductor material and has a source region, a channel region, and a drain region for a transistor; forming a gate stack over the channel region; performing a surface treatment to the fin in the source and drain regions, thereby converting an outer portion of the fin in the source and drain regions into a different material other than the first semiconductor material; etching the converted outer portion of the fin in the source and drain regions, thereby reducing a width of the fin in the source and drain regions; and depositing an epitaxial layer over the fin in the source and drain regions.

Source and drain surface treatment for multi-gate field effect transistors

Growing community of inventors

Hsin-Chu, Taiwan

Chun-Hsiang Fan