Taiwan Semiconductor Manufacturing Comp. Ltd.

Chun Chieh Lin

Yee-Chia Yeo

Fu-Liang Yang

Syun-Ming Jang Jang

Shih-Chang Chen

Mong-Song Liang

Chenming Hu

Chao-Hsiung Wang

Hung-Wen Su

Liang-Gi Yao

Chien-Chao Huang

Minghsing Tsai

Chen Ming Hu

Tien-Chih Chang

The present disclosure provides a method of fabricating a semiconductor device. The method includes forming a patterned dielectric layer having a plurality of first openings. The method includes forming a conductive liner layer over the patterned dielectric layer, the conductive liner layer partially filling the first openings. The method includes forming a trench mask layer over portions of the conductive liner layer outside the first openings, thereby forming a plurality of second openings, a subset of which are formed over the first openings. The method includes depositing a conductive material in the first openings to form a plurality of vias and in the second openings to form a plurality of metal lines. The method includes removing the trench mask layer.

Gap filling method for dual damascene process

A method of forming a strained silicon layer on a relaxed, low defect density semiconductor alloy layer such as SiGe is provided.

Relaxed silicon germanium substrate with low defect density

A process for fabricating CMOS devices, featuring a channel region comprised with a strained SiGe layer, has been developed. The process features the selective growth of a composite silicon layer on the top surface of N well and P well regions. The composite silicon layer is comprised of a thin, strained SiGe layer sandwiched between selectively grown, undoped silicon layers. The content of Ge in the SiGe layer, between about 20 to 40 weight percent, allows enhanced carrier mobility to exist without creation of silicon defects. A thin silicon dioxide gate insulator is thermally grown from a top portion of the selectively grown silicon layer, located overlying the selectively grown SiGe layer.

Complementary metal oxide semiconductor transistor technology using selective epitaxy of a strained silicon germanium layer

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Taichung, Taiwan

Chun Chieh Lin