Advanced Semiconductor Engineering, Inc.

Chueh-An Hsieh

Li-Cheng Tai

Shih-Kuang Chen

Shyh-Ing Wu

Tsung-Hua Wu

Jiunn Chen

Tsung-Chieh Ho

Jui-I Yu

A first dielectric layer is formed on a mold having a surface and protruding components and covers the protruding components. At least one electronic component having an active surface, a back surface, and contacts formed on the active surface is disposed on the first dielectric layer. The active surface is faced to the first dielectric layer, and the contacts are corresponding to the protruding components. A second dielectric layer is formed on the first dielectric layer and a carrier is disposed on the back surface of the electronic component. Openings located corresponding to the contacts are further formed within the first dielectric layer by the protruding components in an imprinting step, such that when the mold is removed, the contacts are exposed from the openings.

Substrate process for an embedded component

A bumping process and a structure thereof are provided. The bumping process includes the following steps. Firstly, a wafer having a number of pads is provided. Next, a UBM layer is formed on the pad. Then, a conductive first photo-resist layer is coated on the wafer to cover the UBM layer. Next, a second photo-resist layer is coated on the first photo-resist layer. Then, at least a portion of the second photo-resist layer is removed to form an opening above the UBM layer. The first photo-resist layer maintains electric connection with the UBM layer. Next, a solder layer is formed in the opening by electroplating process. Then, the first photo-resist layer and the second photo-resist layer are removed expect the portion of the first photo-resist layer under the solder layer.

Bumping process and structure thereof

A method for forming bumps is disclosed. First, a substrate having a surface and an under bump metallurgy layer formed thereon is provided, and a portion of the under bump metallurgy layer is removed thereafter. Next, a mask having a metal layer thereon is disposed over the surface of substrate, in which the mask includes at least one opening for exposing the under bump metallurgy layer. Subsequently, a metal is disposed in the opening and the mask having the metal layer is removed.

Method for forming bumps

A wafer structure including a semiconductor substrate, a number of UBM layers and a number of bumps is provided. The semiconductor substrate has an active surface, a number of bonding pads and a passivation layer. The bonding pads are positioned on the active surface of the semiconductor substrate. The passivation layer covers the active surface of the semiconductor substrate and exposes the bonding pads. The UBM layers are respectively arranged on the bonding pads, and each UBM layer includes an adhesive layer, a super-lattice barrier layer and a wetting layer. The adhesion layer is disposed on bonding pads. The super-lattice barrier layer is disposed on the adhesion layer and includes a number of alternately stacked sub-barrier layers and sub-wetting layers. The wetting layer is disposed on the super-lattice barrier layer, and the bump is disposed on the wetting layer.

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Kao-Hsiung, Taiwan

Chueh-An Hsieh