Siemens Aktiengesellschaft

Christine Fellinger

Jenoe Tihanyi

Ludwig Leipold

Roland Weber

Josef Einzinger

Jeno Tihanyi

Reinhard J Stengl

Ulrich Goesele

Ludwid Leipold

A bipolar transistor is disclosed including a semiconductor body having a cathode-side surface and an anode-side surface, and at least one insulated gate electrode. The semiconductor body has a central region with a predetermined doping concentration and of a first conductivity type. The central region borders on the cathode-side surface of the semiconductor body. Bordering on the cathode-side surface, at least one gate region is provided which borders on the central region. The gate region is of the second conductivity type and has a higher doping concentration than the central region. In the gate region, a source region is provided which borders on the cathode-side surface. The gate electrode is seated on an insulating layer applied on the cathode-side surface and covers the gate region. Between the anode-side surface and the central region is provided an anode region of the second conductivity type which has a higher doping concentration than the central region. Between gate region and source region, a shunt is provided. The anode region is a recrystallized region of a metal silicon alloy doped with a doping substance.

Bipolar transistor electrode

A signal voltage (E) based upon a supply voltage must be converted to a signal voltage (A) with ground reference so as to enable further processing in a logic circuit. A simple level converter comprises a series connection of a MOSFET (T1) connected to the supply voltage; the MOSFET also comprises a resistor (T2). The source terminal of the MOSFET (T1) is located at the potential of the supply voltage. The voltage to be converted is applied between the gate terminal and the source terminal, and the converted voltage occurs at the resistor (T2). The two voltages are each limited by one Zener diode (D2, D1).

Integrable buffer circuit for voltage level conversion having clamping

The temperature of the power semiconductor component is sensed by a bipolar transistor. The bipolar transistor is in series with a depletion mode MOSFET whose gate and source electrodes are connected together. The drain electrode is also connected to a threshold element. Normally, the FET has low impedance, so that at the input of the threshold element source potential, e.g. ground potential, is present. With current rising as a function of temperature, the current through the FET is limited to a constant, essentially temperature-independent value, and the potential at the input of the threshold element rises steeply. This condition is detected as an overtemperature signal.

Overtemperature detection of power semiconductor components

The voltage peaks occuring upon disconnection of inductive loads are normally attenuated by a by-pass diode connected in parallel with the load. The driving countervoltage is thereby limited to the value of the forward voltage drop of the diode. For a power MOSFET with a source-side inductive load, the driving countervoltage is increased by placing a series connection of an additional MOSFET and a Zener diode between the gate of the power MOSFET and the connection of the load which is remote from the power MOSFET. The driving countervoltage at the source now becomes the Zener voltage plus the occuring gate-source voltage of the power MOSFET.

MOSFET switch with inductive load

When a power MOSFET operated as a source follower is driven by an electronic switch, an interruption of the connection between ground and the electronic switch may result in the output potential of the electronic switch to change so that the power MOSFET is partially switched on. This causes a considerable amount of power dissipation. Therefore, there is placed between the source and gate electrodes of the MOSFET a depletion MOSFET whose gate is connected to the terminal of the electronic switch intended for connection to ground. Thus, the power MOSFET remains non-conducting upon interruption of the connection between the electronic switch and ground.

Drive circuit for a power MOSFET with source-side load

In a circuit arrangement having a phototransistor, in order to increase the inverse voltage strength of the phototransistor, a resistor that carries off the collector-base inverse current generally lies between the base zone and the emitter zone of the phototransistor. This resistor should be as large as possible given illumination in order to increase the current gain. The resistor according to the invention is formed by the drain-source path of an IGFET of depletion type whose gate terminal is at a fixed potential. The IGFET is conductive in the unilluminated condition of the phototransistor. During illumination, its resistance increases given an increasing photocurrent.

Circuit arrangement comprising a phototransistor

A switching circuit includes two series-connected MOSFET (1, 6) complementing one another, which are interconnected at the drain terminal of each device. The gate terminal of the MOSFET that is grounded is connected to a control input terminal (E). This gate terminal is also connected to the source terminal of a depletion FET (7). The drain terminal of the depletion FET (7) is connected to the gate terminal of the second MOSFET (6) and, in turn, is connected via a resistor (8) to a voltage source (+U). The gate terminal of the depletion FET (7) is grounded. The load (5) is then connected to the drain side of the complementary MOSFET. When the switch is in a blocking condition, the cross current is thus prevented from flowing; and the FET connected to voltage can be completely activated.

High voltage MOSFET switch

A method for the manufacture of a pn junction having a high breakdown voltage at the boundary surface of a semiconductor body, utilizing a mask which has a relatively large opening for introducing a dopant therethrough into the semiconductor body, the mask having a marginal edge which extends laterally beyond the edge of the relatively large opening. In the marginal edge, the mask is provided with smaller, auxiliary openings, the openings being sized and spaced such that lesser amounts of dopant pass through the opening as the distance of the auxiliary openings from the edge of the relatively larger opening increases. Upon introducing the dopant into the semiconductor body through the mask, there is generated a doping profile which gradually approaches the boundary surface with increasing distance from the edge of the relatively large opening.

Method for the manufacture of a pn junction with high breakdown voltage

Planar semiconductor component which has a substrate of one conduction type, and a contact-connected zone of opposite conductivity type embedded in the surface of the substrate in planar fashion and having a part thereof emerging to the surface. It also has a control electrode covering that part of the contact-connected contacted zone which emerges to the surface, an insulating layer on the surface, an edge electrode seated on the insulating layer at the edge of the substrate and electrically connected to the substrate, and at least one protective ring zone of the opposite conductivity type positioned between the edge of the substrate and the contact-connected zone and embedded in planar fashion in the surface. The ring zone includes at least one conducting layer completely covering a part of the substrate emerging to the surface between the protective ring zone and the contacted zone, wherein the conducting layer is electrically insulated from the emerging part of the substrate, and electrically contacted by one of the contact-connected protective ring zones embedded in planar fashion in the substrate surface.

Semiconductor component with planar structure

A circuit arrangement for drive of a thyristor with light comprises a zero pause control which permits an ignition of a thyristor only in a proximity of a zero point of the thyristor voltage. The control contains an IGFET which transports away a base current of the phototransistor effecting ignition when the thyristor voltage exceeds a specific value. The gate terminal of the IGFET connects to an alternating voltage via a photodiode. The zero point control can only be activated when the photodiode is illuminated.

Circuit arrangement for drive of a thyristor with light

In a circuit arrangement for drive of a thyristor with a phototransistor, the collector-emitter path of the phototransistor is between one of two alternating voltage terminals and a gate terminal of the thyristor. In order to prevent an activation of the unilluminated phototransistor due to a steep voltage edge (dv/dt) load), its base current given such a load is carried off via an IGFET of the enhancement type. This IGFET is controlled by an IGFET of the depletion type acting as a current source which lies between a gate terminal and source terminal of the enhancement type IGFET. A capacitor is connected in series with the depletion-type IGFET. This series connection lies between the two alternating voltage terminals.

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Unterhaching, Germany

Christine Fellinger