Actron Technology Corporation

Ching-Wen Liu

Hsin-Chang Tsai

A circuit substrate includes a base material, a first electrode, and a second electrode. The base material has an upper side and a lower side opposite to each other in a length direction. The first electrode extends and is configured on the base material along the length direction. The second electrode is configured beside the first electrode and includes a first portion and a second portion connected to each other. The first portion is configured on the base material along the length direction. The second portion is configured on the base material along a width direction and is located between the upper side and the first electrode. A cross-sectional width of the first portion becomes larger from the lower side to the upper side.

Circuit substrate and electronic device

An intelligent power module packaging structure includes an insulated heat dissipation substrate, a plurality of power devices, a control chip, a lead frame, and an encapsulant. The insulated heat dissipation substrate has a first surface and a second surface opposite to the first surface. The power devices are disposed on the first surface. The control chip is disposed on the first surface. The control chip provides a gate driver function for driving the power devices and a pulse width modulation function. The lead frame is bonded onto the first surface. The power devices are electrically connected to the control chip and the lead frame. The encapsulant at least encapsulates the power devices, the control chip, and a portion of the lead frame, and the second surface is entirely or partially exposed outside the encapsulant.

Intelligent power module packaging structure

A power device package structure including a first substrate, a second substrate, at least one power device, and a package is provided. A heat conductivity of the first substrate is greater than 200 WmK. The power device is disposed on the first substrate, and the second substrate is disposed under the first substrate. A heat capacity of the second substrate is greater than that of the first substrate. The package encapsulates the first substrate, the second substrate, and the power device.

Power device package structure

A package structure for power devices includes a heat dissipation insulating substrate, a plurality of power devices, a heat dissipation baseplate, and a thermal interface layer. The heat dissipation insulating substrate has a first surface and a second surface which are opposite to each other, and the power devices are coupled to the first surface of the heat dissipation insulating substrate. The heat dissipation baseplate is disposed at the second surface of the heat dissipation insulating substrate, wherein at least one of a surface of the heat dissipation baseplate and the second surface of the heat dissipation insulating substrate has at least one plateau, and the plateau is at least disposed within a projected area of the plurality of power devices. The thermal interface layer is disposed between the second surface of the heat dissipation insulating substrate and the surface of the heat dissipation baseplate.

Package structure for power device

A chip packaging structure includes a heat dissipation substrate, a pre-molded chipset, an interconnection and a second encapsulant. The pre-molded chipset is located on the heat dissipation substrate. The interconnection is located in the packaging structure and electrically connects the heat dissipation substrate and the pre-molded chipset. The second encapsulant covers part of the heat dissipation substrate, part or all of the interconnection, and part or all of the pre-molded chipset. The pre-molded chipset includes a thermally conductive substrate, at least two chips, a patterned circuit, and a first encapsulant. The patterned circuit is located in the pre-molded chipset. At least two chips are electrically connected by the patterned circuit. The first encapsulant covers at least two chips and part or all of the patterned circuit. A manufacturing method of a chip packaging structure is also provided.

Growing community of inventors

Taoyuan, Taiwan

Ching-Wen Liu