Western Digital Technologies, Inc.

Sandisk Technologies Inc.

Sandisk Corporation

Sandisk Information Technology (Shanghai) Co., Ltd.

Siliconware Precision Industries Co., Ltd.

Sandisk Semiconductor (Shanghai) Co. Ltd.

Chin-Tien Chiu

Hem P Takiar

Chih-Chin Liao

Cheemen Yu

Han-Shiao Chen

Ken Jian Ming Wang

Cheeman Yu

Jack Chang Chien

Cong Zhang

Yazhou Zhang

Xuyi Yang

Ning Ye

Chin-Huang Chang

Shineng Ma

Chien-Ko Liao

Ye Bai

Binbin Zheng

Zhongli Ji

Kaiyou Qian

Ning Liu

Shrikar Bhagath

Zhong Lu

Yangming Liu

Zengyu Zhou

Jiandi Du

Dacheng Huang

Che-Jung Chang

Hui Liu

Jung-Pin Huang

Chung-Lun Liu

Weili Wang

Fen Yu

Fuqiang Xiao

Wenbin Qu

Qi Deng

Shiv Kumar

Yuang Zhang

Kuo-Chien Wang

Jack Chang-Chien

Sundarraj Chandran

Lei Shi

Li Ping Wang

Chih-Ming Huang

Jia Tao Li

Hua Fang Tan

Wei Gu

Suresh Kumar Upadhyayula

Ting Liu

Junrong Yan

Rui Guo

Kim Lee Bock

Xin Lu

Weiting Jiang

King Hoo Ong

Yanwen Bai

Xiaofeng Di

JinXiang Huang

CheeKeong Chin

Xiaohui Wang

Peng Fu

Enyong Tai

Lu Zhong

Shaopeng Dong

Chaur Yang Ng

Chenlin Yang

Guocheng Zhong

Dongpeng Xue

Huirong Zhang

Pradeep Kumar Rai

En-Yong Tai

Min Ni

Jiang Hua Java Zhu

Chin-Thuang Chang

Cheng-Lun Liu

Matthew Chen

A semiconductor wafer includes semiconductor dies and laser grooves formed in the scribe lines along the long edges of the semiconductor dies. A laser groove extends between the long edges of two adjacent semiconductor dies to encompass the corners of the two adjacent semiconductor dies. When diced, the resulting semiconductor dies have portions of the corners removed.

Semiconductor wafer and semiconductor dies formed therefrom including grooves along long edges of the semiconductor dies

A method of forming a semiconductor device includes forming vertical contact fingers in a substrate having side portions that are flexible. Contact fingers are formed near one or more edges of the flexible side portions of the substrate. After semiconductor dies are mounted to and electrically coupled to the substrate, the semiconductor device may be encapsulated by placing the device in a mold chase including upper and lower mold plates. The lower mold plate is sized smaller than the substrate so that the flexible side portions of the substrate including the contact fingers fold vertically upward to fit within the mold.

Method of forming a semiconductor device including vertical contact fingers

Systems, methods, and devices for 3D packaging. In some embodiments, a semiconductor package includes a first die and a second die. The first die includes a first bonding pad on a top of the first die and near a first edge of the first die. The second die includes a second bonding pad on a top of the second die and near a second edge of the second die. A pillar is located on the second bonding pad. The first die is mounted on top of the second die such that the first edge is parallel to the second edge and offset from the second edge such that the pillar is exposed. A wire is bonded to a bonding surface of the pillar and bonded to a bonding surface of the first bonding pad.

Wire bond pad design for compact stacked-die package

A thermoelectric semiconductor device includes a heat dissipating semiconductor module and a stack of flash memory dies mounted on a substrate. The heat dissipating module comprises a first semiconductor die such as a controller, and a second semiconductor die such as a thermoelectric semiconductor die to cool the first semiconductor die during operation. The thermoelectric semiconductor die may be mounted to the controller die at the wafer level.

Thermoelectric semiconductor device and method of making same

A semiconductor device has shielding to prevent transmission and/or reception of EMI and/or RFI radiation. The semiconductor device comprises a substrate including grounded contact pads around a periphery of the substrate, exposed at one or more edges of the substrate. A bump made of gold or other non-oxidizing conductive material may be formed on the contact pads, for example using ultrasonic welding to remove an oxidation layer between the contact pads and the conductive bumps. The conductive bumps electrically couple to a conductive coating applied around the periphery of the semiconductor device.

Semiconductor device including conductive bumps to improve EMI/RFI shielding

A semiconductor device includes a vertical column of wire bonds on substrate contact fingers of the device. Semiconductor dies are mounted on a substrate, and electrically coupled to the substrate such that groups of semiconductor dies may have bond wires extending to the same contact finger on the substrate. By bonding those wires to the contact finger in a vertical column, as opposed to separate, side-by-side wire bonds on the contact finger, an area of the contact finger may be reduced.

Semiconductor device including vertical wire bonds

A substrate-less integrated electronic element module for a semiconductor package, comprising: at least two electronic elements, each of the at least two electronic elements having first electrical connectors; and a first molding compound encapsulating the at least two electronic elements, the first molding compound comprising a first planar surface and an opposing second planar surface of the integrated electronic element module, wherein each of the first electrical connectors is directly exposed on the first planar surface of the integrated electronic element module. Further, a semiconductor package including the integrated electronic element module and the method of fabricating the same is provided.

Integrated electronic element module, semiconductor package, and method for fabricating the same

A memory card includes a memory card body dimensioned to house at least one integrated circuit die package. The memory card body, in certain embodiments, includes a first surface spaced apart from a second surface and a plurality of side surfaces connecting the first surface to the second surface. The memory card also includes a contact pad disposed on at least one side surface of the plurality of side surfaces. The contact pad includes a first conductive layer, a second conductive layer, and an insulating layer disposed between the first conductive layer and the second conductive layer.

Side contact pads for high-speed memory card

A semiconductor device is disclosed having reinforced supports at corners of the device. The semiconductor device may include solder balls on a lower surface of the device for soldering the device onto a printed circuit board. In one example, the solder balls at the corners of the semiconductor device may be replaced by support billets having more mass and more contact area between the semiconductor device and the PCB. In a further example, screws may be provided at the corners of the device (instead of the corner solder balls or in addition to the corner solder balls). These screws may be placed through the corners of the semiconductor device and into the printed circuit board.

Semiconductor device including reinforced corner supports

A semiconductor die is provided. The semiconductor die includes: at least one complementary metal oxide semiconductor (CMOS) circuit module electrically coupled to at least one memory die, the at least one memory die being separated from the semiconductor die; and a controller module electrically coupled to the CMOS circuit module and configured to control the at least one CMOS circuit module and the at least one memory die. A semiconductor package is also provided.

Semiconductor die and semiconductor package

A semiconductor device is disclosed including one or more stacks of semiconductor dies vertically molded together in an encapsulated block. The semiconductor dies may comprise memory dies, or memory dies and a controller die.

Semiconductor device including vertically stacked semiconductor dies

A semiconductor device is disclosed including wafers of stacked integrated memory modules. A semiconductor device of the present technology may include multiple memory array semiconductor wafers, and a CMOS controller wafer, which together, operate as a single, integrated flash memory semiconductor device. In embodiments, the CMOS controller wafer may include semiconductor dies comprising ASIC logic circuits integrated together with memory array logic circuits.

High capacity semiconductor device including bifurcated memory module

A semiconductor device is disclosed including a multi-module interposer for enabling communication between one or more semiconductor dies within the device and a host device on which the semiconductor device is mounted. The multi-module interposer may be formed at the wafer level, and provides fan-out signal paths to and from the one or more dies in the device. Additionally, the multi-module interposer allows any of a variety of different semiconductor packaging configurations to be formed at the wafer level, including for example wire bonded packages, flip chip packages and through silicon via (TSV) packages.

Multi-module integrated interposer and semiconductor device formed therefrom

Growing community of inventors

Taichung, Taiwan

Chin-Tien Chiu