United Microelectronics Corp.

Mediatek Corporation

Fujian Jinhua Integrated Circuit Co., Ltd.

Taiwan Semiconductor Manufacturing Comp. Ltd.

United Semiconductor Corp.

Prolific Technology Inc.

Chin-Lung Lin

Harn-Jiunn Wang

Yao-Ching Ku

Yi-Hsiu Lee

Tai-Lai Tung

Yi-Cheng Chen

Ming-Jui Chen

You-Tsai Jeng

Chia-Hao Chang

Shih-Fang Tzou

Kai-Wen Cheng

Ko-Yin Lai

Chi-Chih Chen

Chih-Hsien Tang

Yao-Jen Fan

Kuan-Wen Fang

Te-Chuan Wang

Kai-Wen Yeh

Tsung-Ying Tsai

Hsu-Yang Wang

Chuen-Huei Yang

Keng-Lon Lei

Ping-Cheng Hsu

Szu-Hsiang Lai

Kuo-Chang Tien

Chien-Hsiung Wang

Wen-Tien Hung

Kuo-Chang Cheng

Koji Taniguchi

Chih-Chiang Tu

Chien-Ting Ho

Ying-Chiao Wang

Yung-Feng Cheng

Le-Tien Jung

Kuei-Chun Hung

Tai-Bor Wu

Chuen Huei Yang

Yueh-Lin Chou

Hung-Wei Lin

Tsung-Yeh Wu

Jon-Yiew Gan

Po-Ching Su

Yen-Hung Chen

Sheng-Lung Teng

Kai-Ming Liu

Lun-Wen Yeh

Wei-Han Chien

Chia-Chun Tsai

Venson Lee

Yu-Sung Chang

Chih-Wei Chou

Teng-Yao Chang

A clock control method for a High Definition Multimedia Interface (HDMI) receiver operating in a power-saving mode in a sink device is provided. The HDMI receiver has a first module, a second module, and a third module. The clock control method includes the following stages. A clock signal is enabled to be sent to the first module and the third module during a first region of received data. The clock signal is disabled to be sent to the second module during the first region of the received data. The clock signal is enabled to be sent to the third module and the clock signal is disabled to be sent to the first module and the second module during a second region of the received data.

Clock control method and electronic device thereof

A channel hiatus correction method for an HDMI device is provided. A recovery code from scrambled data of the stream is obtained. A liner feedback shift register (LFSR) value of channels of the HDMI port is obtained based on the recovery code and the scrambled data of the stream. The stream is de-scrambled according to the LFSR value of the channels of the HDMI port. Video data is displayed according to the de-scrambled stream.

Channel hiatus correction method and HDMI device

A method for forming a memory device includes the steps of providing a substrate, forming an isolation structure in the substrate to define a plurality of active regions in the substrate, the active regions respectively comprising two terminal portions and a central portion between the terminal portions, forming a plurality of island features on the substrate, wherein each of the island features covers two of the terminals portions respectively belonging to two of the active regions, performing a first etching process, using the island features as an etching mask to etch the substrate to define a plurality of island structures and a first recessed region surrounding the island structures on the substrate, and removing the island features to expose the island structures.

Method of forming a memory device

A power-saving method for an HDMI device is provided. The method includes detecting color depth information of video data from an HDMI source which is connected to the HDMI port, deriving a horizontal length for each line by fragment of a picture frame according to the color depth information, generating a plurality of synchronization signals according to the horizontal length for each line by fragment, and powering on the HDMI port, according to the synchronization signals, for a predetermined time period to obtain encrypted information from the HDMI source, and powering off the HDMI port after the predetermined time period.

HDMI device and power-saving method for immediately switching HDMI ports

A power-saving method for switching High Definition Multimedia Interface (HDMI) ports on a sink device is provided. The sink device has a first HDMI port initially being enabled for displaying and a second HDMI port being disabled for displaying. The power-saving method includes the steps of using the reference signals to locate the VSYNC active edge in each frame generated by a source device connected to the second HDMI port; turning on the power to the second HDMI port during a power-on region corresponding to the VSYNC active edge in each frame and turning off power otherwise; obtaining information related to a high bandwidth digital content protection (HDCP) in the power-on region; and displaying video data from the source device based on the HDCP information when enabling the second HDMI port connected to the source device.

A method for forming a memory device is disclosed, including providing a substrate, forming an isolation structure and plural active regions in the substrate, forming a plurality of island features on the substrate respectively covering two of the terminal portions of the active regions, using the island features as an etching mask to etch the substrate to perform a first etching process to define a first recessed region and plural island structures on the substrate. The island structures respectively comprise the two terminal portions of the active regions and the first recessed region comprises the central portions of the active regions.

A method for forming patterns is provided in the present invention. The process includes the steps of using a first mask to perform a first exposure process to a photoresist, using a second mask to perform a second exposure process to the photoresist, wherein the corners of the second opening patterns in the second mask and the corners of the first opening patterns in the first mask overlap each other, and performing a development process to remove the unexposed portions of the photoresist in the two exposure processes to form staggered hole patterns therein.

Method for forming patterns

A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a substrate, a plurality of active areas, and an isolation structure. The substrate has a device region and a peripheral region surrounding the device region. The active areas are located in the substrate in the device region. When viewed from above, the edges of the ends of the active areas adjacent to the boundary of the device region are aligned with each other, and the width of the ends of the active areas adjacent to the boundary of the device region is greater than the width of the other portions of the active areas. The isolation structure is disposed in the substrate and surrounds the active areas and is located in the peripheral region.

Semiconductor device and manufacturing method thereof

A method for generating a layout pattern includes following steps. A basic layout pattern including a plurality of first stripe patterns in a first cluster region is provided. Each first stripe pattern extends in a first direction, and the first stripe patterns have equal pitches in a second direction. A plurality of anchor bar patterns are generated. Each anchor bar pattern extends in the first direction, and the anchor bar patterns have equal pitches in the second direction. Edges of at least one of the anchor bar patterns in the second direction are aligned with edges of two adjacent first stripe patterns respectively. At least one of the anchor bar patterns overlaps a first space between two adjacent first stripe patterns. At least one first mandrel pattern is generated at the first space overlapped by the anchor bar pattern, and the first mandrel pattern is outputted to a photomask.

Method for generating layout pattern

An optical proximity correction (OPC) process is provided. The method comprising receiving a first pattern corresponding to a first structure of a semiconductor structure, and a second pattern corresponding to a second structure of said semiconductor structure. Next, a first OPC process is performed for the first pattern to obtain a revised first pattern, wherein the revised first pattern has a first shift regarding to the first pattern. A second OPC process is performed for the second pattern to obtain a revised second pattern, wherein the second OPC process comprises moving the second pattern according to the first shift.

Optical proximity correction method

A layout pattern decomposition method includes following steps. A layout pattern is received. The layout pattern includes a plurality of features, and an edge-to-edge space is respectively defined in between two adjacent features. A sum of a width of the edge-to-edge space and a width of the feature on a left side of the edge-to-edge space and a sum of the width of the edge-to-edge space and a width of the feature on a right side of the edge-to-edge space are respectively calculated. The sums and a predetermined value are respectively compared. When any one of the sums is smaller than the predetermined value, the two features on the two sides of the edge-to-edge space are colored by a first color and alternatively a second color. The features including the first color are assigned to a first pattern and the features including the second color to a second pattern.

Layout pattern decomposition method

A method of optical proximity correction executed by a computer system for modifying line patterns includes the following steps. First, providing an integrated circuit layout with parallel line patterns and interconnect patterns disposed corresponding to the parallel line patterns. Then, using the computer to modify the integrated circuit layout based on a position of the interconnect patterns so as to generate a convex portion and a concave portion respectively on two sides of each of the parallel line patterns. Portions of the line pattern in front of and behind the convex portion and the concave portion are straight lines and have an identical critical dimension.

Method of optical proximity correction for modifying line patterns and integrated circuits with line patterns modified by the same

A method of decomposing pattern layout for generating patterns on photomasks is disclosed. The method includes decomposing features of an integrated circuit layout into discrete patterns based on the relation between these features. The features include first features and second features. The first features are then classified into a first feature pattern and a second feature pattern, and the second features are classified into third, fourth, fifth and sixth feature patterns. The spacings of the second features in the fifth and sixth feature patterns are greater than a minimum exposure limits. Finally, the first feature pattern is outputted to a first photomask, the second feature pattern is outputted to a second photomask, the third and fifth feature patterns are outputted to a third photomask, and the fourth and sixth feature patterns are outputted to a fourth photomask.

Method of decomposing layout for generating patterns on photomasks

A method of forming trenches is provided. A first layer, a second layer and a third layer are formed on the substrate. A patterned third layer with a plurality of third trenches is formed. A spacer is formed on sidewalls of the third trenches, following by removing a portion of the patterned third layer between the third trenches. By using the spacer and the patterned third layer as a mask, a patterned second layer with a plurality of second trenches is formed. Next, the patterned third layer and the spacer are completely removed, and a block layer is formed on the patterned second layer, filling into the at least one second trench to separate said second trench into at least two parts. The first layer is patterned by using the patterned second layer and the block layer as a mask to form a patterned first layer with first trenches.

Method of forming trenches

A method of correcting assist features includes the following steps. At first, a first layout pattern is received by a computer system, and the first layout pattern is split into a plurality of first regions. Subsequently, a plurality of assist features are added into the first layout pattern to form a second layout pattern, wherein at least one of the assist features neighboring any one of the edges of the first regions is defined as a selected pattern. Then, the second layout pattern is split into a plurality of second regions. Afterwards, a check step is performed on the second region including the selected pattern, and the second layout pattern is corrected to form a corrected second layout pattern.

Method of correcting assist feature

Growing community of inventors

Hsinchu, Taiwan

Chin-Lung Lin