Taiwan Semiconductor Manufacturing Comp. Ltd.

TSMC Nanjing Company, Limited

Chih-Mu Huang

Ru-Shang Hsiao

I-Chih Chen

Chi-Cherng Jeng

Fu-Tsun Tsai

Volume Chien

Ling-Sung Wang

Ying-Hao Chen

Wen-Chang Kuo

Jung-Chi Jeng

I-i Cheng

Chih-Kang Chao

Shiu-Ko JangJian

Ying-Lang Wang

Ching-Pin Lin

Yun-Wei Cheng

Pin Chia Su

Yung-Fa Lee

Ting-Chun Kuan

Jen-Pan Wang

Che-Min Lin

Kuan-Jung Chen

Sheng-Lin Hsieh

Chen-Chieh Chiang

Yun Shen Chang

Chih-Fu Chang

Kai-Di Wu

Mingchu King

Chih-Ming Hsieh

Meng-Yi Wu

Cing-Yao Chan

Chun-Ying Wang

Ming-Feng Lee

Ching-Hwanq Su

Fu-Cheng Chang

Hung-Jen Lin

Shin-Yeu Tsai

Yen-Hsiu Chen

Yao-Tsung Chen

Jiun-Jie Huang

Kuan-Yu Chen

Kuan Jung Chen

Ming-Chu King

Chia-Ming Chang

Yun Chen Chang

Ming-Tsang Tsai

Fang-Wei Lin

Ko-Min Lin

Chai-Der Yen

Jia-Ming Huang

A semiconductor device is provided. The semiconductor device includes a semiconductor substrate. The semiconductor device includes an isolation structure in the semiconductor substrate. The isolation structure surrounds an active region of the semiconductor substrate. The semiconductor device includes a gate over the semiconductor substrate. The gate is across the active region and extends onto the isolation structure. The semiconductor device includes a support film over the isolation structure. The support film is a continuous film which continuously covers the isolation structure and the gate over the isolation structure.

Semiconductor device with gate

A semiconductor device includes: first and second fin structures, disposed on a substrate, that respectively extend in parallel to an axis; a first gate feature that traverses the first fin structure to overlay a central portion of the first fin structure; a second gate feature that traverses the second fin structure to overlay a central portion of the second fin structure; a first spacer comprising: a first portion comprising two layers that respectively extend from sidewalls of the first gate feature toward opposite directions of the axis; and a second portion comprising two layers that respectively extend from sidewalls of the first portion of the first spacer toward the opposite directions of the axis; and a second spacer comprising two layers that respectively extend from sidewalls of the second gate feature toward the opposite directions of the axis.

Semiconductor device and method of manufacturing the same

A semiconductor device includes a semiconductor substrate having a first region and a second region, insulators, gate stacks, and first and second S/Ds. The first and second regions respectively includes at least one first semiconductor fin and at least one second semiconductor fin. A width of a middle portion of the first semiconductor fin is equal to widths of end portions of the first semiconductor fin. A width of a middle portion of the second semiconductor fin is smaller than widths of end portions of the second semiconductor fin. The insulators are disposed on the semiconductor substrate. The first and second semiconductor fins are sandwiched by the insulators. The gate stacks are over a portion of the first semiconductor fin and a portion of the second semiconductor fin. The first and second S/Ds respectively covers another portion of the first semiconductor fin and another portion of the second semiconductor fin.

Semiconductor device and manufacturing method thereof

A method for forming a semiconductor device is provided. The method includes forming an isolation structure in a semiconductor substrate. The method includes forming a gate over the semiconductor substrate. The method includes forming a support film over the isolation structure. The support film is a continuous film which continuously covers the isolation structure and the gate over the isolation structure, the support film conformally covers a first portion of a top surface and a second portion of a first sidewall of the gate, the top surface faces away from the semiconductor substrate, the support film and a topmost surface of the active region do not overlap with each other, and the topmost surface faces the gate. The method includes after forming the support film, forming lightly doped regions in the semiconductor substrate and at two opposite sides of the gate.

Method of forming semiconductor device with gate

A semiconductor structure includes a substrate, a gate region, a source/drain region, a composite layer, an ILD layer, a first plug and a second plug. The composite layer includes a first sublayer and a third layer including a first material, and a second sublayer including a second material. The second sublayer is between the first sublayer and the third sublayer. The first plug is through the ILD layer and electrically connected to the gate region. The second plug is through the ILD layer and the composite layer and electrically connected to the source/drain region. The second plug includes a first portion laterally adjoining the first sublayer, a second portion laterally adjoining the second sublayer, and a third portion laterally adjoining the third sublayer. Widths of the first portion and the third portion are smaller than a width of the second portion. The second portion has a substantially curved sidewall profile.

Semiconductor structure

A semiconductor device structure is provided. The semiconductor device structure includes a substrate and a gate structure over the substrate. The semiconductor device structure also includes a source/drain feature in the substrate, protruding from the substrate, and on a sidewall surface of the gate structure. The semiconductor device structure also includes an insulating barrier structure in the substrate and partially covering the bottom and sidewalls of the source/drain feature.

Source/drain structure with barrier in FinFET device and method for forming the same

Among other things, one or more support structures for integrated circuitry and techniques for forming such support structures are provided. A support structure comprises one or more trench structures, such as a first trench structure and a second trench structure formed around a periphery of integrated circuitry. In some embodiments, one or more trench structures are formed according to partial substrate etching, such that respective trench structures are formed into a region of a substrate. In some embodiments, one or more trench structures are formed according to discontinued substrate etching, such that respective trench structures comprise one or more trench portions separated by separation regions of the substrate. The support structure mitigates stress energy from reaching the integrated circuitry, and facilitates process-induced charge release from the integrated circuitry.

Support structure for integrated circuitry

A semiconductor structure includes an active semiconductor fin having a first height, a dummy semiconductor fin adjacent to the active semiconductor fin and having a second height less than the first height, an isolation structure between the active semiconductor fin and the dummy semiconductor fin, and a dielectric cap over the dummy semiconductor fin. The dielectric cap is separated from the active semiconductor fin.

Structure having improved fin critical dimension control

A method for forming a semiconductor device is provided. The method includes forming an isolation structure in a semiconductor substrate, and the isolation structure surrounds an active region of the semiconductor substrate. The method also includes forming a gate over the semiconductor substrate, and the gate is across the active region and extends onto the isolation structure. The gate has an intermediate portion over the active region and two end portions connected to the intermediate portion, the end portions are over the isolation structure. The method includes forming a support film over the isolation structure, and the support film is a continuous film which continuously covers the isolation structure and at least one end portion of the gate.

A semiconductor structure and a method of forming the same are provided. According to an aspect of the disclosure, a semiconductor structure includes a first layer having a bottom portion and a sidewall connected to the bottom portion, a metal layer disposed above the bottom portion of the first layer, and a second layer disposed above the metal layer and laterally surrounded by the sidewall of the first layer. The metal layer includes a periphery and a middle portion surrounded by the periphery, the middle portion being thicker than the periphery, and a first etch rate of an etchant with respect to the metal layer is uniform throughout the metal layer and is greater than a second etch rate of the etchant with respect to the second layer.

Semiconductor structure and manufacturing method thereof

Semiconductor devices and methods of forming the same are disclosed. A semiconductor device includes a substrate, a gate structure over the substrate, a spacer and a source/drain region. The gate structure is disposed over the substrate. The spacer is disposed on a sidewall of the gate structure, wherein the spacer has a top surface lower than a top surface of the gate structure. The source/drain region is disposed adjacent to a sidewall of the spacer.

Semiconductor device and method of forming the same

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Tainan, Taiwan

Chih-Mu Huang