Industrial Technology Research Institute

Win-house Electronic Co., Ltd.

Chih-Ming Shen

Tao-Chih Chang

Ming-Ji Dai

Yu-Wei Huang

Ming-Kaan Liang

Yu-Lin Chao

Chien-Min Hsu

Heng-Chieh Chien

Chih-Ming Tzeng

Chun-Kai Liu

Shih-Hsien Wu

Wei-Chung Lo

Chih-Chung Chiu

Jing-Yao Chang

Sheng-Tsai Wu

Chin-Hung Wang

Kuo-Shu Kao

Fang-Jun Leu

Guo-Shing Huang

Hsin-Han Lin

Yao-Shun Chen

Hsiao-Ming Chang

An-Chun Luo

Li-Ling Liao

Wen-Fu Hsu

Yu-Shan Deng

Chia-Wei Jui

A fabrication method of a flexible electronic package device including the following steps is provided. A tolerable bending radius of the flexible electronic package device is obtained. A minimum surface curvature radius of a selected portion of an applied carrier is obtained. A relationship of the tolerable bending radius being smaller than the minimum surface curvature radius is ensured. The flexible electronic package device is disposed on the selected portion.

Fabrication method of flexible electronic package device

A package structure is provided. The package structure includes a substrate. The package structure also includes a hybrid pad disposed on the substrate. The hybrid pad includes a metal layer and a buffer layer connected to the metal layer. The Young's modulus of the buffer layer is less than the Young's modulus of the metal layer. The package structure further includes an electrically connecting structure disposed on the hybrid pad. The package structure includes a chip layer electrically connected to the electrically connecting structure. The package structure also includes a bonding pad disposed between the electrically connecting structure and the chip layer.

Package structure

A board defect filtering method is provided. The method includes: receiving a defect list; obtaining a plurality of defect images of a plurality of defect records on the defect list; receiving a circuit layout image; analyzing a defect location of a first defect image of the plurality of defect images according to the circuit layout image; cropping the first defect image to obtain a first cropped defect image according to the defect location; inputting the first cropping defect image to a defect classifying model; and determining whether the first defect image is a qualified product image or not according to an output result of the defect classifying model.

Board defect filtering method based on defect list and circuit layout image and device thereof and computer-readable recording medium

A semiconductor package structure is provided. The semiconductor package structure includes a semiconductor chip, a guard ring, a gel layer, and a first lead frame. The guard ring is disposed on the semiconductor chip, and the gel layer is disposed on the guard ring. The first lead frame is electrically connected to the semiconductor chip, and the gel layer is located between the guard ring and the first lead frame.

Semiconductor package structure

A chip temperature computation method and a chip temperature computation device are provided. The chip temperature computation method includes: computing an upper layer thermal resistance and a lower layer thermal resistance of a chip, computing a total thermal resistance of the chip, and computing a temperature of the chip according to the total thermal resistance.

Chip temperature computation method and chip temperature computation device

Provided is a roller with pressure sensor. The roller includes a pressure sensor mounted to the roller. The pressure sensor includes a plurality of pressure sensing units distributed on a thin film. The pressure sensing units are electrically connected to each other with a metal wire but not in contact with each other. Also provided is a roll-to-roll device, which includes a roller mechanism and a pressure sensor.

Roller with pressure sensor and R to R device

An intelligent diagnosis system for a power module. The system includes a power module, a hardware checking module and a diagnostic module. The power module has a temperature sensing element for obtaining a temperature difference between a starting minimum temperature and a current temperature. The hardware checking module has a current sensing element, a voltage sensing element and a magnetic coupling closed loop detection element for obtaining the current, the output voltage and the input voltage of the power module, and the hardware loop status, respectively. The diagnostic module calculates the number of cycles that have been operated, a measured impedance and an instantaneous power based on those measurement results, and calculating a risk index based on the number of cycles that have been operated, the temperature difference, the measured impedance, the instantaneous power and the hardware loop status, thereby determining the accumulation of the abnormality index record.

Intelligent diagnosis system for power module and method thereof

A rail-type organic light emitting diode lamp assembly is provided. The lamp assembly includes a lamp module, an annular member, a connector, a conductive member, and a rail module. The annular member includes a protrusion portion having a pair of indentations. The connector is connected to the annular member, and includes a through hole, a first end provided with a pair of ears and a second end provided with a pair of hooks. The conductive member is provided in the through hole and has a first end in contact with the annular conductive coil. The rail module is connected with the connector and includes a conductor in contact with a second end of the conductive member. The connector can be slidably hooked to the rail module through the hooks, and after the ears are inserted into the indentations, the annular member can be rotatable with respect to the connector.

Rail-type OLED lamp assembly

A fabricating method of a semiconductor light emitting device includes disposing a plurality of non-conductive walls on a substrate. An alignment position is formed between every two adjacent non-conductive walls. A plurality of semiconductor light emitting units on a first carrier board are respectively aligned to the alignment positions. The semiconductor light emitting units are divided into a plurality of groups. The semiconductor light emitting units in one of the groups are dissociated from the first carrier board. Thus, the semiconductor light emitting units in the group fall into the corresponding alignment positions due to gravity. Each of the semiconductor light emitting units is electrically connected with the substrate through a first electrode. A conductive layer is formed on the semiconductor light emitting units. Accordingly, the semiconductor light emitting units are electrically connected together to the conductive layer through second electrodes.

Fabricating method of a semiconductor light emitting device

A semiconductor light emitting device including a substrate, a plurality of semiconductor light emitting units and a plurality of non-conductive walls is provided. The semiconductor light emitting device is disposed on the substrate in an array. Each of the semiconductor light emitting units has a first electrode and a second electrode opposite to the first electrode. Each of the semiconductor light emitting units is electrically connected to the substrate through the first electrode, and the semiconductor light emitting units are electrically connected together to a conducting layer through the second electrodes. The semiconductor light emitting units have different emission colors. The non-conductive walls are disposed between adjacent semiconductor light emitting units, to separate the semiconductor light emitting units. A fabricating method of semiconductor light emitting device is also provided.

Semiconductor light emitting device and fabricating method thereof

In an embodiment, a light emitting device comprises a light emitting diode chip and a spherical extending electrode. The light emitting diode chip includes a semiconductor epitaxial structure, a first electrode and a second electrode. The first electrode and the second electrode are disposed on two opposite sides of the semiconductor epitaxial structure, respectively. The first electrode is disposed between the semiconductor epitaxial structure and the spherical extending electrode, and the spherical extending electrode is electrically connected to the semiconductor epitaxial structure electrically through the first electrode. The volume of the spherical extending electrode is greater than that of the light emitting diode chip.

Light-emitting device and manufacturing method of a display

A testing method of bending stress and a testing apparatus thereof are provided. The method includes the following steps. A stress distribution model of a structure to be tested is built. Next, a testing sample of the structure to be tested is provided, and a force is applied on two ends of the testing sample to bend the testing sample till it breaks at a breaking point, so as to obtain a first distance between the two ends of the testing sample when the testing sample breaks, or a second distance from the breaking point to a closer end of the two ends. Next, a maximum principle stress value of the stress distribution model or a break point principle stress value at the breaking point of the stress distribution model is obtained according to the first distance or the second distance.

Growing community of inventors

Taipei, Taiwan

Chih-Ming Shen