United Microelectronics Corp.

Chih-Hsien Chen

Teng-Chun Tsai

Wen-Chin Lin

Jen-Chieh Lin

Hsin-Kuo Hsu

Ya-Hsueh Hsieh

Ren-Peng Huang

Wei-Che Tsao

Chia-Lin Hsu

Yung-Lun Hsieh

Chih-Chin Yang

Hung-Yuan Lu

A method for manufacturing TSVs, wherein the method comprises several steps as follows: A stack structure having a substrate and an ILD layer (inter layer dielectric layer) is provided, in which an opening penetrating through the ILD layer and further extending into the substrate is formed. After an insulator layer and a metal barrier layer are formed on the stack structure and the sidewalls of the opening, a top metal layer is then formed on the stack structure to fulfill the opening. A first planarization process stopping on the barrier layer is conducted to remove a portion of the top metal layer. A second planarization process stopping on the ILD layer is subsequently conducted to remove a portion of the metal barrier layer, a portion of the insulator layer and a portion of the top metal layer, wherein the second planarization process has a polishing endpoint determined by a light interferometry or a motor current.

Method for manufacturing through-silicon via

A planarization method of manufacturing a semiconductor component is provided. A dielectric layer is formed above a substrate and defines a trench therein. A barrier layer and a metal layer are formed in sequence in the trench. A first planarization process is applied to the metal layer by using a first reactant so that a portion of the metal layer is removed. An etching rate of the first reactant to the metal layer is greater than that of the first reactant to the barrier layer. A second planarization process is applied to the barrier layer and the metal layer by using a second reactant so that a portion of the barrier layer and the metal layer are removed to expose the dielectric layer. An etching rate of the second reactant to the barrier layer is greater than that of the second reactant to the metal layer.

Planarization method applied in process of manufacturing semiconductor component

A floppy diskette drive assignment interchanging apparatus for interchanging the drive letter assignments in a computer system is disclosed. The floppy diskette drives have a drive data cable that includes a number of data lines. The interchanging apparatus comprises an interchange control logic and an assignment interchange logic. The interchange control logic generates an optional interchange control signal, the interchange control signal signifies the requirement for interchange when it is in a first logic state, and signifies the requirement of maintaining no interchange when it is in a second logic state. The assignment interchange logic has a set of inputs connected to each of the data lines among the drive cable data lines that require interchanging, and has a set of outputs for outputting the set of inputs with an output assignment of either a forward or reverse order determined by the active and inactive status of the interchange control signal.

Apparatus for interchanging floppy diskette drive assignments

An apparatus for controlling to support hard disk and/or CD-ROM drives through the PCMCIA interface of a notebook computer system. The apparatus comprises a PCMCIA controller connected to the ISA bus of said computer system for implementing PCMCIA interface functions, and an ATA controller also connected to the ISA bus for implementing ATA interface functions. The apparatus further comprises a multiplexer circuit connected both to the PCMCIA controller and the ATA controller for the apparatus to perform either the PCMCIA or the ATA interface functions under control of a selection signal.

Controlling method and apparatus for supporting hard disk and/or CD-ROM

Growing community of inventors

Miaoli County, Taiwan

Chih-Hsien Chen