Taiwan Semiconductor Manufacturing Comp. Ltd.

Chien-Pin Chan

Cheng-Lin Huang

Chin-Yu Ku

Chien-Ming Huang

Wei-Chih Huang

Wen-Ming Chen

Chun-Yen Lo

Yu-Nu Hsu

Te-Hsun Pang

Chen-Hsun Liu

Chi-Hung Lin

Meng-Fu Shih

Yuan-Fu Liu

Yung-Chiuan Cheng

Ming-Da Cheng

Wen-Hsiung Lu

Yung-Sheng Lin

Hsu-Lun Liu

Su-Fei Lin

Huai-Tei Yang

Yi-Jen Lai

Chih-Kang Han

Chih-Yuan Chien

In a method of manufacturing a semiconductor device first conductive layers are formed over a substrate. A first photoresist layer is formed over the first conductive layers. The first conductive layers are etched by using the first photoresist layer as an etching mask, to form an island pattern of the first conductive layers separated from a bus bar pattern of the first conductive layers by a ring shape groove. A connection pattern is formed to connect the island pattern and the bus bar pattern. A second photoresist layer is formed over the first conductive layers and the connection pattern. The second photoresist layer includes an opening over the island pattern. Second conductive layers are formed on the island pattern in the opening. The second photoresist layer is removed, and the connection pattern is removed, thereby forming a bump structure.

Bump structure and method of making the same

External electrical connectors and methods of forming such external electrical connectors are discussed. A method includes forming an external electrical connector structure on a substrate. The forming the external electrical connector structure includes plating a pillar on the substrate at a first agitation level affected at the substrate in a first solution. The method further includes plating solder on the external electrical connector structure at a second agitation level affected at the substrate in a second solution. The second agitation level affected at the substrate is greater than the first agitation level affected at the substrate. The plating the solder further forms a shell on a sidewall of the external electrical connector structure.

Conductive external connector structure and method of forming

A semiconductor device includes a semiconductor substrate, a pad region on the semiconductor substrate, a passivation layer over the semiconductor substrate and at least a portion of the pad region, and a bump structure overlying the pad region. The passivation layer has an opening defined therein to expose at least another portion of the pad region. The bump structure is electrically connected to the pad region via the opening. The bump structure includes a copper layer and a SnAg layer overlying the copper layer. The SnAg layer has a melting temperature higher than the eutectic temperature of Sn and Ag.

Semiconductor device and semiconductor assembly with lead-free solder

A semiconductor device includes a bump structure over a pad region. The bump structure includes a copper layer and a lead-free solder layer over the copper layer. The lead-free solder layer is a SnAg layer, and the Ag content in the SnAg layer is less than 1.6 weight percent.

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Pingzhen, Taiwan

Chien-Pin Chan