Taiwan Semiconductor Manufacturing Comp. Ltd.

Chien-Chen Li

Kuo-Chio Liu

Chen-Shien Chen

Che-Jung Chu

Cheng-Lin Huang

Wen-Yi Lin

Lieh-Chuan Chen

Ling-Wei Li

Yu-Jui Wu

Heng-Chi Huang

Sheng-Yao Yang

Chin-Yu Ku

Cheng-Hung Chen

Kuang-Chun Lee

Yu-Nu Hsu

Te-Hsun Pang

Shih-Yen Chen

Chun-Chen Liu

Cheng-Nan Hsieh

Yuan-Feng Wu

Sen-Chi Chiang

Ming-Da Cheng

Po-Hao Tsai

Fu-Chen Chang

Ting-Li Yang

Kuo Liang Lu

Ching Tasi Liu

Te Lung Liu

Jing-Cheng Lin

Chien-Li Kuo

Chien-Hung Chen

Li-Hsien Huang

Wen-Chun Huang

Mill-Jer Wang

Yao-Chun Chuang

Hao Chen

Hsi-Kuei Cheng

Chih-Hsien Lin

Ting-Ting Kuo

Hsiang-Tai Lu

Jun He

Wen-Ming Chen

Ruey-Yun Shiue

Meng-Fu Shih

Tzi-Yi Shieh

Chuan-Hsiang Sun

Kuo-Lung Li

Cheng-Liang Cho

Cheng-Pu Chiu

In an embodiment, a device includes: a passivation layer on a semiconductor substrate; a first redistribution line on and extending along the passivation layer; a second redistribution line on and extending along the passivation layer; a first dielectric layer on the first redistribution line, the second redistribution line, and the passivation layer; and an under bump metallization having a bump portion and a first via portion, the bump portion disposed on and extending along the first dielectric layer, the bump portion overlapping the first redistribution line and the second redistribution line, the first via portion extending through the first dielectric layer to be physically and electrically coupled to the first redistribution line.

Semiconductor device and method

A substrate for a semiconductor package includes an array of bonding pads on a first surface of the substrate, and a plurality of raised structures adjacent to at least some of the bonding pads on the first surface of the substrate. The raised structures may be configured to control the height of solder balls contacting the array of bonding pads when the package substrate is mounted onto a support substrate. The raised structures may compensate for a deformation of the package substrate so that the co-planarity of the solder balls may be improved, thereby providing an improved solder connection between the package substrate and the support substrate.

Systems for semiconductor package mounting with improved co-planarity

Embodiments provide metal features which dissipate heat generated from a laser drilling process for exposing dummy pads through a dielectric layer. Because the dummy pads are coupled to the metal features, the metal features act as a heat dissipation feature to pull heat from the dummy pad. As a result, reduction in heat is achieved at the dummy pad during the laser drilling process.

Heat dissipating features for laser drilling process

A chip package structure is provided. The chip package structure includes a chip. The chip package structure includes a conductive ring-like structure over and electrically insulated from the chip. The conductive ring-like structure surrounds a central region of the chip. The chip package structure includes a first solder structure over the conductive ring-like structure. The first solder structure and the conductive ring-like structure are made of different materials.

Chip package structure with ring-like structure

A package structure is provided. The package structure includes a substrate and a chip-containing structure over the substrate. The package structure also includes a protective lid attached to the substrate through a first adhesive element and a second adhesive element. The first adhesive element has a first electrical resistivity, and the second adhesive element has a second electrical resistivity. The second electrical resistivity is greater than the first electrical resistivity. The second adhesive element is closer to a corner edge of the substrate than the first adhesive element, and a portion of the second adhesive element is between the first adhesive element and the chip-containing structure.

Package structure with protective lid

A probe head structure is provided. The probe head structure includes a flexible substrate having a top surface and a bottom surface. The probe head structure includes a first probe pillar passing through the flexible substrate. The first probe pillar has a first protruding portion protruding from the bottom surface. The probe head structure includes a redistribution structure on the top surface of the flexible substrate and the first probe pillar. The redistribution structure is in direct contact with the flexible substrate and the first probe pillar. The redistribution structure includes a dielectric structure and a wiring structure in the dielectric structure. The wiring structure is electrically connected to the first probe pillar. The probe head structure includes a wiring substrate over the redistribution structure. The probe head structure includes a first conductive bump connected between the wiring substrate and the redistribution structure.

Method for forming probe head structure

Package structures and methods for manufacturing the same are provided. The package structure includes a first bump structure formed over a first substrate. The first bump structure includes a first pillar layer formed over the first substrate and a first barrier layer formed over the first pillar layer. In addition, the first barrier layer has a first protruding portion laterally extending outside a first edge of the first pillar layer. The package structure further includes a second bump structure bonded to the first bump structure through a solder joint. In addition, the second bump structure includes a second pillar layer formed over a second substrate and a second barrier layer formed over the second pillar layer. The first protruding portion of the first barrier layer is spaced apart from the solder joint.

Package structure with a barrier layer

A chip package structure is provided. The chip package structure includes a chip. The chip package structure includes a conductive bump over and electrically connected to the chip. The chip package structure includes a ring-like structure over and electrically insulated from the chip. The ring-like structure surrounds the conductive bump, and the ring-like structure and the conductive bump are made of a same material.

A package structure and a formation method of a package structure are provided. The method includes disposing a chip structure over a substrate, and forming a first adhesive element over the substrate. The first adhesive element has a first electrical resistivity. The method also includes forming a second adhesive element over the substrate. The second adhesive element has a second electrical resistivity, and the second electrical resistivity is greater than the first electrical resistivity. The method further includes attaching a protective lid to the substrate through the first adhesive element and the second adhesive element. The protective lid surrounds the chip structure and covers a top surface of the chip structure.

Structure and formation method of chip package with protective lid

A method for forming a chip package structure is provided. The method includes forming a first conductive bump and a first ring-like structure over a chip. The first ring-like structure surrounds the first conductive bump, the first ring-like structure and the first conductive bump are made of a same first material, the chip includes an interconnect structure, and the first ring-like structure is electrically insulated from the interconnect structure and the first conductive bump. The method includes bonding the chip to a substrate through the first conductive bump.

A method for forming a package structure includes forming an under bump metallization (UBM) layer over a metal pad and forming a photoresist layer over the UBM layer. The method further includes patterning the photoresist layer to form an opening in the photoresist layer. The method also includes forming a first bump structure over the first portion of the UBM layer. The first bump structure includes a first barrier layer over a first pillar layer. The method includes placing a second bump structure over the first bump structure. The second bump structure includes a second barrier layer over a second pillar layer. The method further includes reflowing the first bump structure and the second bump structure to form a solder joint between a first inter intermetallic compound (IMC) and a second IMC.

Method for forming package structure with a barrier layer

Chip package structure including ring-like structure and method for forming the same

A package structure is provided. The package structure includes a first bump structure formed over a substrate, a solder joint formed over the first bump structure and a second bump structure formed over the solder joint. The first bump structure includes a first pillar layer formed over the substrate and a first barrier layer formed over the first pillar layer. The first barrier layer has a first protruding portion which extends away from a sidewall surface of the first pillar layer, and a distance between the sidewall surface of the first pillar layer and a sidewall surface of the first barrier layer is in a range from about 0.5 &#x3bc;m to about 3 &#x3bc;m. The second bump structure includes a second barrier layer formed over the solder joint and a second pillar layer formed over the second barrier layer, wherein the second barrier layer has a second protruding portion which extends away from a sidewall surface of the second pillar layer.

Package structure with a barrier layer and method for forming the same

Package structures and methods for forming the same are provided. A package structure includes a package component including a first bump. The package structure also includes an intermetallic compound (IMC) on the first bump. The package structure further includes an integrated circuit die including a second bump on the IMC. The integrated circuit die and the package component are bonded together through the first bump and the second bump. The IMC extends from the first bump to the second bump to provide good physical and electrical connections between the first bump and the second bump.

Method for forming package structure including intermetallic compound

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Hsinchu, Taiwan

Chien-Chen Li