Taiwan Semiconductor Manufacturing Comp. Ltd.

TSMC Solid State Lighting Ltd.

Epistar Corporation

Chia-Lin Yu

Chen-Hua Douglas Yu

Wen-Chih Chiou

Ding-Yuan Chen

Hung-Ta Lin

Hsiang-Yi Wang

Li-Hsien Huang

Tsang-Jiuh Wu

Cheng-Hung Chang

Ebin Liao

Chun Hua Chang

Darryl Kuo

Jui-Pin Hung

Chien Ling Hwang

Yung-Chi Lin

Hung-Pin Chang

Der-Chyang Yeh

Yung-Chow Peng

Jaw-Juinn Horng

Chung-Hui Chen

Cheng-Tung Lin

Yung-Sheng Chiu

Shau-Lin Shue

Weng-Jin Wu

Ku-Feng Yang

Hsin-Hsien Lu

Fu-Chi Hsu

Chu-Sung Shih

A semiconductor component includes a substrate having an opening. The semiconductor component further includes a first dielectric liner in the opening, wherein the first dielectric liner having a thickness Tat a first end of the opening, and a thickness Tat a second end of the opening, and Ris a ratio of Tto T. The semiconductor component further includes a second dielectric liner over the first dielectric liner, wherein the second dielectric liner having a thickness Tat the first end of the opening, a thickness Tat the second end of the opening, Ris a ratio of Tto T, and Ris greater than R.

Semiconductor component having through-silicon vias

A method of making a semiconductor component includes etching a substrate to define an opening. The method further includes depositing a first dielectric liner in the opening, wherein the first dielectric liner has a first stress. The method further includes depositing a second dielectric liner over the first dielectric liner, wherein the second dielectric liner has a second stress, and a direction of the first stress is opposite a direction of the second stress. The method further includes depositing a conductive material over the second dielectric liner.

Method of making a semiconductor component having through-silicon vias

A method of making a semiconductor device is provided including forming a first opening and a second opening in a first surface of a substrate. A conductive material is formed in the first opening and in the second opening and over the first surface in the first region of the substrate between the openings. A thickness of the substrate may be reduced from a second surface of the substrate, opposite the first surface, to a third surface opposite the first surface which exposes the conductive material in the first opening and the conductive material in the second opening. A light emitting diode (LED) device is connected to the third surface of the substrate.

Method of manufacturing a semiconductor device including through silicon plugs

A semiconductor component includes a semiconductor substrate having an opening A first dielectric liner having a first compressive stress is disposed in the opening. A second dielectric liner having a tensile stress is disposed on the first dielectric liner. A third dielectric liner having a second compressive stress disposed on the second dielectric liner.

Semiconductor component having through-silicon vias and method of manufacture

A light-emitting device comprises a plurality of light-emitting pillars separated from each other by a space, wherein each of the plurality of light-emitting pillars comprises a first conductivity type layer, an active layer on the first conductivity type layer, and a second conductivity type layer on the active layer; a reflective layer surrounding a sidewall of each of the plurality of light-emitting pillars; a top electrode formed on the reflective layer and the plurality of light-emitting pillars; and a fill material formed between the reflective layer and the top electrode.

Light-emitting device

A light-emitting device comprises a substrate; a plurality of light-emitting diodes formed on the substrate, wherein each of the plurality of light-emitting diodes comprises a first conductivity type layer, an active layer on the first conductivity type layer, and a second conductivity type layer on the active layer; a reflective layer surrounding a sidewall of each of the plurality of light-emitting diodes; and a top electrode formed on the reflective layer and the plurality of light-emitting diodes.

Light-emitting device including reflective layer

A semiconductor device having light-emitting diodes (LEDs) formed on a concave textured substrate is provided. A substrate is patterned and etched to form recesses. A separation layer is formed along the bottom of the recesses. An LED structure is formed along the sidewalls and, optionally, along the surface of the substrate between adjacent recesses. In these embodiments, the surface area of the LED structure is increased as compared to a planar surface. In another embodiment, the LED structure is formed within the recesses such that the bottom contact layer is non-conformal to the topology of the recesses. In these embodiments, the recesses in a silicon substrate result in a cubic structure in the bottom contact layer, such as an n-GaN layer, which has a non-polar characteristic and exhibits higher external quantum efficiency.

Light-emitting diodes on concave texture substrate

Through silicon via (TSV) isolation structures are provided and suppress electrical noise such as may be propagated through a semiconductor substrate when caused by a signal carrying active TSV such as used in 3D integrated circuit packaging. The isolation TSV structures are surrounded by an oxide liner and surrounding dopant impurity regions. The surrounding dopant impurity regions may be P-type dopant impurity regions that are coupled to ground or N-type dopant impurity regions that may advantageously be coupled to V. The TSV isolation structure is advantageously disposed between an active, signal carrying TSV and active semiconductor devices and the TSV isolation structures may be formed in an array that isolates an active, signal carrying TSV structure from active semiconductor devices.

Through silicon via (TSV) isolation structures for noise reduction in 3D integrated circuit

A method of making a semiconductor device, the method includes forming a first opening and a second opening in a substrate. The method further includes forming a conductive material in the first opening and in the second opening, the conductive material comprising a joined portion where the conductive material in the first opening and the conductive material in the second opening are electrically and thermally connected together at a first surface of the substrate. The method further includes reducing a thickness of the substrate from a second surface of the substrate, opposite the first surface, to expose the conductive material in the first opening and the conductive material in the second opening. The method further includes connecting a device to the second surface of the substrate.

A system and method for manufacturing a light-generating device is described. A preferred embodiment comprises a plurality of LEDs formed on a substrate. Each LED preferably has spacers along the sidewalls of the LED, and a reflective surface is formed on the substrate between the LEDs. The reflective surface is preferably located lower than the active layer of the individual LEDs.

Method of forming light-generating device including reflective layer

A light-emitting diode (LED) device is provided. The LED device has raised semiconductor regions formed on a substrate. LED structures are formed over the raised semiconductor regions such that bottom contact layers and active layers of the LED device are conformal layers. The top contact layer has a planar surface. In an embodiment, the top contact layers are continuous over a plurality of the raised semiconductor regions while the bottom contact layers and the active layers are discontinuous between adjacent raised semiconductor regions.

Light-emitting diode with textured substrate

The substrate with through silicon plugs (or vias) described above removes the need for conductive bumps. The process flow is very simple and cost efficient. The structures described combines the separate TSV, redistribution layer, and conductive bump structures into a single structure. By combining the separate structures, a low resistance electrical connection with high heat dissipation capability is created. In addition, the substrate with through silicon plugs (or vias, or trenches) also allows multiple chips to be packaged together. A through silicon trench can surround the one or more chips to provide protection against copper diffusing to neighboring devices during manufacturing. In addition, multiple chips with similar or different functions can be integrated on the TSV substrate. Through silicon plugs with different patterns can be used under a semiconductor chip(s) to improve heat dissipation and to resolve manufacturing concerns.

Semiconductor package with through silicon vias

A structure comprises a substrate, a mask, a buffer/nucleation layer, and a group III-V compound semiconductor material. The substrate has a top surface and has a recess from the top surface. The recess includes a sidewall. The first mask is the top surface of the substrate. The buffer/nucleation layer is along the sidewall, and has a different material composition than a material composition of the sidewall. The III-V compound semiconductor material continuously extends from inside the recess on the buffer/nucleation layer to over the first mask.

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Sigang, Taiwan

Chia-Lin Yu