Taiwan Semiconductor Manufacturing Comp. Ltd.

Chia Kuei Hsu

Shin-Puu Jeng

Po-Yao Lin

Shu-Shen Yeh

Chin-Hua Wang

Po-Chen Lai

A chip package structure is provided. The chip package structure includes a wiring substrate. The chip package structure includes an interposer substrate over the wiring substrate. The interposer substrate includes a redistribution structure, a dielectric layer, a conductive via, and a plurality of first dummy vias, the dielectric layer is over the redistribution structure, the conductive via and the first dummy vias pass through the dielectric layer, the first dummy vias surround the conductive via, and the first dummy vias are electrically insulated from the wiring substrate. The chip package structure includes a chip structure over the interposer substrate. The chip structure is electrically connected to the conductive via, and the chip structure is electrically insulated from the first dummy vias.

Growing community of inventors

Hsinchu, Taiwan

Chia Kuei Hsu