Bridge Semiconductor Corporation

Industrial Technology Research Institute

Brodge Semiconductor Corporation

Chia-Chung Wang

Charles W C Lin

Sangwhoo Lim

David M Sigmond

Chung-Tao Chang

Charles Wc Lin

Ming Yu Shih

Cheng-Chung Chen

Rong-Shen Lee

Hsin-Chien Huang

Kuo-Chuan Chen

Hsing-Seng Wang

Chin Hock Tan

The leadframe substrate mainly includes a modulator, a plurality of metal leads, a resin layer and a crack inhibiting structure. The resin layer provides mechanical bonds between the modulator and the metal leads disposed about peripheral sidewalls of the modulator. The crack inhibiting structure includes a continuous interlocking fiber sheet that covers the modulator/resin interfaces, so that the segregation induced along the modulator/resin interfaces or cracks formed within the resin layer can be prevented or restrained from extending to the top surfaces, thereby ensuring the signal integrity of the flip chip assembly.

Leadframe substrate having modulator and crack inhibiting structure and flip chip assembly using the same

The interconnect substrate mainly includes a stiffener, a core layer, a warp balancer and a routing circuitry. The stiffener has an elastic modulus higher than 100 GPa and is laterally surrounded by the core layer. The warp balancer is disposed over the top surface of the core layer and laterally surrounds a cavity aligned with the stiffener. The routing circuitry is disposed under the bottom surfaces of the stiffener and the core layer and electrically connected to the stiffener. By the high modulus of the stiffener, local thermo-mechanical stress induced by un-even thickness can be counterbalanced. Furthermore, adjusting the ratio of the stiffener thickness to the cavity dimension can maintain the cavity area stiffness and modulate the global flatness.

Interconnect substrate with stiffener and warp balancer and semiconductor assembly using the same

The wiring substrate includes a cavity and a plurality of metal leads disposed around the cavity. The metal leads are bonded with a resin compound and provide horizontal and vertical routing for a semiconductor device to be disposed in the cavity. The resin compound fills in spaces between the metal leads and surrounds the cavity and provides a dielectric platform for a re-distribution layer or a build-up circuitry optionally deposited thereon.

Methods of making wiring substrate for stackable semiconductor assembly and making stackable semiconductor assembly

A face-to-face semiconductor assembly is characterized by a semiconductor device positioned in a dielectric recess of a core base and surrounded by an array of metal posts. The recess in the core provides lateral displacement control between the device and the metal posts, and the minimal height of the metal posts needed for the vertical connection between both opposite sides of the core base can be reduced by the amount equal to the depth of the recess. Further, the semiconductor device is face-to-face electrically coupled to another semiconductor device through a buildup circuitry therebetween.

Face-to-face semiconductor assembly having semiconductor device in dielectric recess

A method of making a wiring board having an electrical isolator and metal posts incorporated in a resin core is characterized by the provision of moisture inhibiting caps covering interfaces between the electrical isolator/metal posts and a surrounding plastic material. In a preferred embodiment, the electrical isolator and metal posts are bonded to the resin core by an adhesive substantially coplanar with the metal films on the electrical isolator, the metal posts and the metal layers on two opposite sides of the resin core at smoothed lapped top and bottom surfaces so that a metal bridge can be deposited on the adhesive at the smoothed lapped bottom surface to completely cover interfaces between the electrical isolator/metal posts and the surrounding plastic material. Conductive traces are also deposited on the smoothed lapped top surface to provide electrical contacts for chip connection and electrically coupled to the metal posts.

Wiring board having electrical isolator and moisture inhibiting cap incorporated therein and method of making the same

A wiring board includes a low CTE (coefficient of thermal expansion) and high thermal conductivity isolator incorporated in a resin laminate by an adhesive and a bridging element disposed over the isolator and the resin laminate and electrically coupled to a first routing circuitry on the isolator and a second routing circuitry on the resin laminate. The isolator provides CTE-compensated contact interface for a semiconductor chip to be assembled thereon, and also provides primary heat conduction for the chip. The bridging element offers a reliable connecting channel for interconnecting contact pads on the isolator to terminal pads on the resin laminate.

Wiring board having isolator and bridging element and method of making wiring board

A semiconductor assembly includes an encapsulated device and a thermally enhanced device face-to-face mounted together through first and second routing circuitries and a heat spreader that provides thermal dissipation and electromagnetic shielding. The encapsulated device has a first semiconductor chip sealed in an encapsulant, whereas the thermally enhanced device has a second semiconductor chip thermally conductible to a shielding lid of the heat spreader and laterally surrounded by posts of the heat spreader. The first and second semiconductor chips are mounted on two opposite sides of the first routing circuitry, and the second routing circuitry is disposed on the shielding lid and electrically coupled to the first routing circuitry by bumps. The first and second routing circuitries provide staged fan-out routing for the first and second semiconductor chips.

Semiconductor assembly with electromagnetic shielding and thermally enhanced characteristics and method of making the same

A wiring board with dual stiffeners and integrated dual routing circuitries is characterized in that first and second routing circuitries are positioned within and beyond a through opening of a first stiffener, respectively, and an array of vertical connecting channels are disposed on the second routing circuitry and laterally surrounded by a second stiffener. The mechanical robustness of the first and second stiffeners can prevent the wiring board from warping. The vertical connecting channels can offer electrical contacts for next-level connection. The first routing circuitry, positioned within the through opening of the first stiffener, can provide primary fan-out routing, whereas the second routing circuitry not only provides further fan-out wiring structure for the first routing circuitry, but also mechanically binds the first routing circuitry with the first stiffener.

Wiring board with dual stiffeners and dual routing circuitries integrated together and method of making the same

A wiring board includes an electronic component laterally surrounded by a leadframe, and first and second buildup circuitries disposed beyond the space laterally surrounded by the leadframe and extending over the leadframe. The electronic component includes a first routing circuitry, an encapsulant, optionally an array of vertical connecting elements and optionally a second routing circuitry integrated together. The first routing circuitry provides primary routing for the semiconductor device, whereas the first and second buildup circuitries not only provides further routing, but also mechanically binds the electronic component with the leadframe. The leadframe provides electrical connection between the first buildup circuitry and the second buildup circuitry.

Wiring board having component integrated with leadframe and method of making the same

The wiring substrate includes a cavity and a plurality of vertical connecting channels disposed around the cavity. The vertical connecting channels are bonded with a resin compound and electrically connected to a routing circuitry or a conducting layer under the cavity. The bottom of the cavity is covered by a dielectric layer of the routing circuitry or the resin compound, and an aperture is formed through the dielectric layer of the routing circuitry or the resin compound to be communicated with the cavity. As a result, a semiconductor device can be face-down disposed in the cavity and electrically connected to the routing circuitry or the conducting layer by bonding wires extending through the aperture.

Wiring substrate for stackable semiconductor assembly and stackable semiconductor assembly using the same

A wiring board includes an electronic component laterally surrounded by a stiffener, and a third routing circuitry disposed beyond the space laterally surrounded by the stiffener and extends over the stiffener. The electronic component includes a first routing circuitry, an encapsulant, an array of vertical connecting elements and a second routing circuitry integrated together. The mechanical robustness of the stiffener can prevent the wiring board from warping. The embedded semiconductor device is electrically coupled to the first routing circuitry and surrounded by the vertical connecting elements in electrical connection with the first and second routing circuitries. The first routing circuitry provides primary fan-out routing for another semiconductor device to be assembled on the wiring board, whereas the third routing circuitry not only provides further fan-out wiring structure, but also mechanically binds the electronic component with the stiffener.

Wiring board with embedded component and integrated stiffener, method of making the same and face-to-face semiconductor assembly using the same

The wiring substrate includes a cavity and a plurality of metal leads disposed around the cavity. The metal leads are bonded with a resin compound and electrically connected to a buildup circuitry or a re-distribution layer under the cavity. The bottom of the cavity is covered by a dielectric layer of the buildup circuitry or the resin compound, and an aperture is formed through the dielectric layer of the buildup circuitry or the resin compound to be communicated with the cavity. As a result, a semiconductor device can be face-down disposed in the cavity and electrically connected to the buildup circuitry or the re-distribution layer by bonding wires extending through the aperture.

An interconnect substrate includes vertical connection channels around a cavity. The vertical connection channels are made of a combination of metal posts and metallized vias. The cavity includes a recess in a core layer and an aperture in a stiffener. The metal posts, disposed over the top surface of the core layer, are sealed in the stiffener and are electrically connected to a buildup circuitry adjacent to the bottom surface of the core layer. The minimal height of the metal posts needed for the vertical connection can be reduced by the amount equal to the depth of the recess. The buildup circuitry is electrically connected to the metal posts through the metallized vias.

Interconnect substrate having cavity for stackable semiconductor assembly, manufacturing method thereof and vertically stacked semiconductor assembly using the same

A package-on-package semiconductor assembly is characterized by a semiconductor device positioned in a dielectric recess of a core base and surrounded by an array of metal posts. The recess in the core provides lateral displacement control between the device and the metal posts, and the minimal height of the metal posts needed for the vertical connection between two both opposite sides of the core base can be reduced by the amount equal to the depth of the recess. Further, another semiconductor device is disposed over a top surface of the core base and is electrically coupled to the semiconductor device in the dielectric recess through a buildup circuitry under a bottom surface of the core base.

Package-on-package semiconductor assembly having bottom device confined by dielectric recess

A semiconductor assembly includes an anti-warping controller, a semiconductor device, a balance layer and a first routing circuitry positioned within a through opening of a stiffener and a second routing circuitry positioned outside of the through opening of the stiffener and electrically connected to the first routing circuitry and a vertical connecting element of the stiffener. The mechanical robustness of the stiffener and the anti-warping controller can prevent the assembly from warping, whereas the vertical connecting element of the stiffener provides electrical connection between two opposite sides of the stiffener. The first routing circuitry can enlarge the pad size and pitch of the semiconductor device, whereas the second routing circuitry not only provides further fan-out wiring structure, but also mechanically binds the first routing circuitry with the stiffener.

Growing community of inventors

Hsinchu, Taiwan

Chia-Chung Wang