Taiwan Semiconductor Manufacturing Comp. Ltd.

Chi-Wu Chou

Kong-Beng Thei

Ta-Hsun Yeh

Kuo-Reay Peng

Chun-Hon Chen

Yen-Shih Ho

Ssu-Pin Ma

Heng-Ming Hsu

A metal-insulator-metal (MIM) capacitor structure and method of fabrication for CMOS circuits having copper interconnections are described. The method provides metal capacitors with high figure of merit Q (X/R) and which does not require additional masks and metal layers. The method forms a copper capacitor bottom metal (CBM) electrode while concurrently forming the pad contacts and level of copper interconnections by the damascene process. An insulating (SiN) metal protect layer is formed on the copper and a capacitor interelectrode dielectric layer is formed. A metal protecting buffer is used to protect the thin interelectrode layer, and openings are etched to pad contacts and interconnecting lines. A TiN/AlCu/TiN metal layer is deposited and patterned to form the capacitor top metal (CTM) electrodes, the next level of interconnections, and to provide a pad protect layer on the copper pad contacts. The thick TiN/AlCu/TiN CTM electrode reduces the capacitor series resistance and improves the capacitor figure of merit Q, while the pad protect layer protects the copper from corrosion.

Metal-insulator-metal (MIM) capacitor structure in copper-CMOS circuits using a pad protect layer

This MIM structure provides metal capacitors with high figure of merit Q (X /R) and does not require additional masks and metal layers. A copper capacitor bottom metal (CBM) electrode is formed, while concurrently forming the pad contacts and level of copper interconnections by the damascene process. An insulating (Si N ) metal protect layer is formed on the copper and a capacitor interelectrode dielectric layer is formed. A metal protecting buffer protects the thin interelectrode layer, and openings are etched to pad contacts and interconnecting lines. A TiN/AlCu/TiN metal layer is deposited and patterned to form the capacitor top metal (CTM) electrodes, the next level of interconnections, and to provide a pad protect layer on the copper pad contacts. The thick TiN/AlCu/TiN CTM electrode reduces the capacitor series resistance and improves the capacitor figure of merit Q, while the pad protect layer protects the copper from corrosion.

Method for making a new metal-insulator-metal (MIM) capacitor structure in copper-CMOS circuits using a pad protect layer

In many mixed-signal or radio frequency Rf applications, inductors and capacitors are needed at the same time. For a high performance inductor devices, a thick metal layer is needed to increase performance, usually requiring an extra masking process. The present invention describes both a structure and method of fabricating both copper metal-insulator-metal (MIM) capacitors and thick metal inductors, simultaneously, with only one mask, for high frequency mixed-signal or Rf, CMOS applications, in a damascene and dual damascene trench/via process. High performance device structures formed by this invention include: parallel plate capacitor bottom metal (CBM) electrodes and capacitor top metal (CTM) electrodes, metal-insulator-metal (MIM) capacitors, thick inductor metal wiring, interconnects and contact vias.

Dual damascene interconnect structures that include radio frequency capacitors and inductors

Copper process compatible CMOS metal-insulator-metal capacitor structure and its process flow

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Hsin-Chu, Taiwan

Chi-Wu Chou