Taiwan Semiconductor Manufacturing Comp. Ltd.

Chi-Cherng Jeng

Shiu-Ko JangJian

Volume Chien

Yun-Wei Cheng

Chih-Mu Huang

Kuo-Cheng Lee

Hsin-Chi Chen

Fu-Tsun Tsai

Zhe-Ju Liu

Ru-Shang Hsiao

Chen-Chieh Chiang

Wei-Barn Chen

Ting-Huang Kuo

Chun-Hao Chou

I-i Cheng

Ting-Chun Wang

Chia-Yu Wei

Yin-Chieh Huang

Tzu-Kai Lin

Chih-Kang Chao

Zen-Fong Huang

Chi-Wen Liu

Tsung-Han Tsai

I-Chih Chen

Jung-Chi Jeng

Pin Chia Su

Che-Min Lin

Fu-Cheng Chang

Su-Hua Chang

Kuang-Yao Lo

Allen Tseng

Wan-Chen Huang

Ying-Lang Wang

Ying-Hao Chen

Shyh-Wei Cheng

Yun Shen Chang

Chiu-Jung Chen

Chuan-Pu Liu

Kun-Huei Lin

Chen-Chun Chen

Ren-Hau Yu

Chen Hsin-Chi

Yi-Sheng Liu

Kei-Wei Chen

Chii-Ming M Wu

Li-Yi Chen

Chi-Cheng Hung

Yu-Sheng Wang

Feng-Chien Hsieh

Yuan-Ko Hwang

Chih-Nan Wu

Chun-Che Lin

Min Hao Hong

Chih-Fei Lee

Ming-Ching Chung

Yen-Hsung Ho

Huan-En Lin

Huang-Ta Huang

Wen-Sheng Lin

Yueh-Ching Chang

Yu-Heng Cheng

Weng-Cheng Chen

Hao-Han Wei

Tong Jun Huang

Shih-Ciang Huang

Wang Chun-Ying

Hung-Pin Chen

Shih-Chieh Chang

Yung-Lung Hsu

Sen-Hong Syue

Shin-Yeu Tsai

Jun-Nan Nian

Chia-Pin Cheng

Yi-Hsing Chu

Shang-Yen Wu

Tzu Kai Lin

Ssu-Chiang Weng

Ching-Hua Kuan

Hsi-Jung Wu

Yi-Chung Lin

Hung Pin Chen

Chia-Pin Lo

Wen-Lung Lai

Nan-Chi Lu

Fang-Wei Lin

I-l Cheng

Yin Chieh Huang

Chai-Der Yen

Jung-Liang Chien

Chao Chih-Kang

Yu-Te Hung

An image sensor includes a pixel array, a dielectric layer, a plurality of first conductive shielding regions, and a plurality of second conductive shielding regions. The pixel array includes photodiodes within a substrate. The dielectric layer is over the substrate. From a plan view, the first conductive shielding regions are adjacent four corners of the pixel array, and the second conductive shielding regions are adjacent four sides of the pixel array. The second conductive region has a length-to-width ratio greater than a length-to-width ratio of the first conductive region.

Backside illuminated image sensor device with shielding layer and forming method

A structure and a formation method of a semiconductor device are provided. The semiconductor device includes a semiconductor substrate and a fin structure over the semiconductor substrate. The semiconductor device also includes a gate stack covering a portion of the fin structure and an epitaxially grown source/drain structure over the fin structure and adjacent to the gate stack. The semiconductor device further includes a semiconductor protection layer over the epitaxially grown source/drain structure. The semiconductor protection layer has an atomic concentration of silicon greater than that of the epitaxially grown source/drain structure.

Structure and formation method of fin-like field effect transistor

A device includes a FinFET on a first region of a substrate and a planar-FET on a second region of the substrate. The FinFET includes a FinFET source region, a FinFET drain region, and a FinFET gate between the FinFET source region and the FinFET drain region. The planar-FET includes a planar-FET source region, a planar-FET drain region, and a planar-FET gate between the planar-FET source region and the planar-FET drain region. A bottommost position of the FinFET source region is lower than a bottommost position of the planar-FET source region.

Semiconductor device having planar transistor and FinFET

A FinFET device structure and method for forming the same are provided. The FinFET device structure includes a first, second, third and fourth fin structures over a substrate. The first and the second fin structures have a first and a second sidewall surfaces respectively. The third and the fourth fin structure have a third and a fourth sidewall surfaces respectively. The first and the second sidewall surfaces extend along a first direction. The third and the fourth sidewall surfaces extend along a second direction different from the first direction. A first and a second isolation structures are over the substrate and surrounding the first and the second fin structure and surrounding the third and the fourth fin structures respectively. A distance between top portions of the third and the fourth sidewall surfaces is greater than that between top portions of the first and the second sidewall surfaces.

Fin field effect transistor (FinFet) device structure and method for forming the same

A backside illuminated image sensor device with a shielding layer and a manufacturing method thereof are provided. In the backside illuminated image senor device, a patterned conductive shielding layer is formed on a dielectric layer on a backside surface of a semiconductor substrate and surrounding a pixel array on a front side surface of the semiconductor substrate.

Method of forming backside illuminated image sensor device with shielding layer

An image sensor includes a substrate, a photosensitive unit in the substrate, a dielectric grid over the substrate, and a color filter over the photosensitive unit and surrounded by the dielectric grid. The dielectric grid has a first portion and a second portion over the first portion, and the second portion of the dielectric grid has a rounded top surface extending upwards from a sidewall of the first portion of the dielectric grid. The color filter has a first portion lower than a lowermost portion of the rounded top surface of the second portion of the dielectric grid and a second portion higher than the lowermost portion of the rounded top surface of the second portion of the dielectric grid.

Image sensor

A semiconductor device includes a substrate, a first fin extending from the substrate, a first gate structure over the substrate and engaging the first fin, and a first epitaxial feature partially embedded in the first fin and raised above a top surface of the first fin. The semiconductor device further includes a second fin extending from the substrate, a second gate structure over the substrate and engaging the second fin, and a second epitaxial feature partially embedded in the second fin and raised above a top surface of the second fin. A first depth of the first epitaxial feature embedded into the first fin is smaller than a second depth of the second epitaxial feature embedded into the second fin.

Method semiconductor device fabrication with improved epitaxial source/drain proximity control

Backside illuminated image sensor device with shielding layer

A device includes first and second transistors and first and second isolation structures. The first transistor includes a raised structure, a first gate structure over the raised structure, and a first source/drain structure over the raised structure and adjacent the first gate structure. The first isolation structure surrounds the raised structure and the first source/drain structure of the first transistor. A bottommost surface of the first source/drain structure is spaced apart from a topmost surface of the first isolation structure. The second transistor includes a fin structure, a second gate structure over the raised structure, and a second source/drain structure over the fin structure. The second isolation structure surrounds a bottom of the fin structure of the second transistor. A bottommost surface of the second source/drain structure is in contact with a topmost surface of the second isolation structure.

A FinFET device structure and method for forming the same are provided. The FinFET device structure includes a first fin structure over a substrate, and a second fin structure over the substrate. The FinFET device structure also includes a first isolation structure over the substrate and surrounding the first fin structure. The first fin structure is protruded from a top surface of the first isolation structure. The FinFET device structure further includes a second isolation structure over the substrate and surrounding the second fin structure. The second fin structure is protruded from a top surface of the second isolation structure, and the first fin structure has a vertical sidewall surface and the second fin structure has a sloped sidewall surface.

Fin field effect transistor (finFET) device structure and method for forming the same

A semiconductor structure includes a substrate, a gate region, a source/drain region, a composite layer, an ILD layer, a first plug and a second plug. The composite layer includes a first sublayer and a third layer including a first material, and a second sublayer including a second material. The second sublayer is between the first sublayer and the third sublayer. The first plug is through the ILD layer and electrically connected to the gate region. The second plug is through the ILD layer and the composite layer and electrically connected to the source/drain region. The second plug includes a first portion laterally adjoining the first sublayer, a second portion laterally adjoining the second sublayer, and a third portion laterally adjoining the third sublayer. Widths of the first portion and the third portion are smaller than a width of the second portion. The second portion has a substantially curved sidewall profile.

Semiconductor structure

An image sensor device is provided. The image sensor device includes a semiconductor substrate and a light sensing region in the semiconductor substrate. The image sensor device also includes a dielectric layer over the semiconductor substrate and a filter partially surrounded by the dielectric layer. The filter has a protruding portion protruding from a bottom surface of the dielectric layer. The image sensor device further includes a shielding layer between the dielectric layer and the semiconductor substrate and surrounding the protruding portion of the filter. In addition, the image sensor device includes a reflective element between the shielding layer and an edge of the light sensing region.

Mechanisms for forming image sensor device

Among other things, one or more support structures for integrated circuitry and techniques for forming such support structures are provided. A support structure comprises one or more trench structures, such as a first trench structure and a second trench structure formed around a periphery of integrated circuitry. In some embodiments, one or more trench structures are formed according to partial substrate etching, such that respective trench structures are formed into a region of a substrate. In some embodiments, one or more trench structures are formed according to discontinued substrate etching, such that respective trench structures comprise one or more trench portions separated by separation regions of the substrate. The support structure mitigates stress energy from reaching the integrated circuitry, and facilitates process-induced charge release from the integrated circuitry.

Support structure for integrated circuitry

An image sensor device is provided. The image sensor device includes a semiconductor substrate including a front surface, a back surface opposite to the front surface, and a light-sensing region extending from the front surface into the semiconductor substrate. The image sensor device includes a light-blocking structure in the semiconductor substrate and surrounding the light-sensing region. The light-blocking structure includes a conductive light reflection structure and a light absorption structure, and the light absorption structure is between the conductive light reflection structure and the back surface. The image sensor device includes an insulating layer between the light-blocking structure and the semiconductor substrate.

Image sensor device

Growing community of inventors

Tainan, Taiwan

Chi-Cherng Jeng