Intel Corporation

Chetana Singh

Tahir Ghani

Charles Henry Wallace

Leonard P Guler

Hossam A Abdallah

Tsuan-Chung Chang

Robert Joachim

Shengsi Liu

Dario Farias

Chia-Ho Tsai

Desalegne Teweldebrhan

Techniques for improved extreme ultraviolet (EUV) patterning using assist features, related transistor structures, integrated circuits, and systems, are disclosed. A number of semiconductor fins and assist features are patterned into a semiconductor substrate using EUV. The assist features increase coverage of absorber material in the EUV mask, thereby reducing bright field defects in the EUV patterning. The semiconductor fins and assist features are buried in fill material and a mask is patterned that exposes the assist features and covers the semiconductor fins. The exposed assist features are partially removed and the protected active fins are ultimately used in transistor devices.

Extreme ultraviolet lithography patterning with assist features

Growing community of inventors

Portland, OR, United States of America

Chetana Singh