Alpha and Omega Semiconductor (cayman) Ltd.

Alpha Omega Semiconductor Inc.

Cheow Khoon Oh

Zhiqiang Niu

Kai Chen

Bum-Seok Suh

Ming-Chen Lu

Son Tran

Wonjin Cho

Xiaoming Sui

James Rachana Bou

Vincent Xue

Yueh-Se Ho

Shekar Mallikarjunaswamy

Xiaotian Zhang

A wafer level chip scale package (WLCSP) structure and a manufacturing method are disclosed. The WLCSP structure comprises a semiconductor die and a stack. The stack comprises a protective tape and a molding compound. A portion of a first interface surface between the molding compound and the protective tape is curved. The manufacturing method comprises the steps of forming a semiconductor structure; attaching the semiconductor structure on a dummy wafer; performing a first dicing process using a first cutting tool; depositing a molding compound; removing the dummy wafer; performing a second dicing process with a second cutting tool. A first aperture of the first cutting tool is larger than a second aperture of the second cutting tool. The portion of the first interface surface being curved reduces the possibility of generation of cracks in the WLCSP structure.

Wafer level chip scale package structure and manufacturing method thereof

An intelligent power module (IPM) has a first, second, third and fourth die paddles, a first, second, third, fourth, fifth and sixth transistors, a tie bar, a low voltage IC, a high voltage IC, a first, second and third boost diodes, a plurality of leads and a molding encapsulation. The first transistor is attached to the first die paddle. The second transistor is attached to the second die paddle. The third transistor is attached to the third die paddle. The fourth, fifth and sixth transistor s are attached to the fourth die paddle. The low and high voltage ICs are attached to the tie bar. The molding encapsulation encloses the first, second, third and fourth die paddles, the first, second, third, fourth, fifth and sixth transistors, the tie bar, the low and high voltage ICs, and the first, second and third boost diodes. The IPM has a reduced top surface area and a reduced number of leads compared to a conventional IPM.

Molded intelligent power module

A power conversion device including a low-side MOSFET, a high-side MOSFET and an integrated control IC chip is disclosed. The power conversion device further includes a substrate comprising a first mounting area having a first group of welding discs and a second mounting area having a second group of welding discs; a first chip flipped and attached to the first mounting area; a second chip flipped and attached to the second mounting area; a metal clip; and a molding body covering a front surface of the substrate, the first chip, the second chip and the metal clip. Metal pads on a front side of the first chip is attached to the first group of welding discs. Metal pads on a front side of the second chip is attached to the second group of welding discs. The metal clip connects a connection pad to a back metal layer of the first chip.

Power device and preparation method thereof

Growing community of inventors

Singapore, Singapore

Cheow Khoon Oh