Taiwan Semiconductor Manufacturing Comp. Ltd.

National Yunlin University of Science and Technology

Cheng-Wei Chen

Cheng-Ta Wu

Ting-Chun Wang

Shiu-Ko JangJian

Jung-Chuan Chou

Wei-Ming You

Shiu-Ko Jangjian

Hong-Yi Wu

Wei-Chuan Chen

Chien-Cheng Chen

Yu-Huei Jiang

Chih-Yu Lin

Operations in fabricating a Fin FET include providing a substrate having a fin structure, where an upper portion of the fin structure has a first fin surface profile. An isolation region is formed on the substrate and in contact with the fin structure. A portion of the isolation region is recessed by an etch process to form a recessed portion and to expose the upper portion of the fin structure, where the recessed portion has a first isolation surface profile. A thermal hydrogen treatment is applied to the fin structure and the recessed portion. A gate dielectric layer is formed with a substantially uniform thickness over the fin structure, where the recessed portion is adjusted from the first isolation surface profile to a second isolation surface profile and the fin structure is adjusted from the first fin surface profile to a second fin surface profile, by the thermal hydrogen treatment.

Flat STI surface for gate oxide uniformity in Fin FET devices

Operations in fabricating a Fin FET include providing a substrate having a fin structure, where an upper portion of the fin structure has a first fin surface profile. An isolation region is formed on the substrate and in contact with the fin structure. A portion of the isolation region is recessed by an etch process to form a recessed portion and to expose the upper portion of the fin structure, where the recessed portion has a first isolation surface profile. A thermal hydrogen treatment is applied to the fin structure and the recessed portion. A gate dielectric layer is formed with a substantially uniform thickness over the fin structure, where the recessed portion is adjusted from the first isolation surface profile to a second isolation surface profile and the fin structure is adjusted from the first fin surface profile to a second fin surface profile by the thermal hydrogen treatment.

A FinFET structure includes a substrate, a plurality of stripes, a metal gate and an oxide material. The stripes are on the substrate. The metal gate is on a sidewall and a top surface of one of the stripes. The oxide material is between the metal gate and the stripes. An average roughness of an interface between the metal gate and the oxide material is in a range of from about 0.1 nm to about 0.2 nm.

FinFet structure

A semiconductor structure and a method for forming the same are provided. The method includes providing a substrate, forming a fin structure extruding from the substrate, forming shallow trench isolations over the substrate, and forming an oxide material over the fin structure. The method further includes forming a carbon-doped amorphous silicon layer or a carbon-doped poly silicon layer over the oxide material, wherein the forming a carbon-doped amorphous silicon layer or a carbon-doped poly silicon layer includes doping carbon in a range of from about 5E19/cmto about 1E22/cm.

FinFET structure and method of manufacturing the same

A separative extended gate field effect transistor based uric acid sensing device is provided, including: a substrate; a conductive layer including a silver paste layer on the substrate and a graphite-based paste layer on the silver paste layer; a conductive wire extended from the conductive layer; a titanium dioxide layer on the conductive layer; and a uric acid enzyme sensing film on the titanium dioxide layer.

Separative extended gate field effect transistor based uric acid sensing device, system and method for forming thereof

The invention provides a method for forming an extended gate field effect transistor (EGFET) based sensor, including: (a) providing a substrate; (b) forming a sensing film including titanium dioxide, ruthenium doped titanium dioxide or ruthenium oxide on the substrate; and (c) forming a conductive wire extended from the sensing film for external contact.

Method for forming extended gate field effect transistor (EGFET) based sensor and the sensor therefrom

The invention provides a multi-electrode measuring system including a front end device which is a sensing device including a multi-electrode sensing device having a plurality of electrodes; a multi-channel fixture coupled to the multi-electrode sensing device; and a reference electrode. A back-end device as a virtual instrumentation is an electronic device including a read out circuit device coupled to the multi-channel fixture and the reference electrode for receiving each original signal from each electrode of the multi-electrode sensing device and the reference electrode determining a sample solution; a data acquisition device coupled to the read out circuit device for digitizing each original signal to form a digital signal and for array sampling; and a signal processing device coupled to the data acquisition device for processing each signal.

Growing community of inventors

Tainan, Taiwan

Cheng-Wei Chen