Taiwan Semiconductor Manufacturing Comp. Ltd.

Cheng-Ting Chen

Chung-Shi Liu

Hsiu-Jen Lin

Ming-Da Cheng

Wei-Yu Chen

Ching-Hua Hsieh

Chih-Chiang Tsao

Chia-Lun Chang

Hsuan-Ting Kuo

Hao-Jan Pei

Chih-Wei Lin

Chun-Cheng Lin

Chia-Shen Cheng

Wen-Hsiung Lu

Yu-Peng Tsai

Wei-Hung Lin

Kuei-Wei Huang

Chien-Wei Lee

Chen-Fa Lu

Philip Yu-Shuan Chung

Chen-Hua Douglas Yu

Hsien-Wei Chen

Mirng-Ji Lii

Meng-Tse Chen

Cheng-Chung Lin

Ai-Tee Ang

Jen-Jui Yu

James Hu

Hui-Min Huang

Cheng-Shiuan Wong

Chao-Wei Chiu

Chung-Cheng Lin

A semiconductor structure includes a die embedded in a molding material, the die having die connectors on a first side; a first redistribution structure at the first side of the die, the first redistribution structure being electrically coupled to the die through the die connectors; a second redistribution structure at a second side of the die opposing the first side; and a thermally conductive material in the second redistribution structure, the die being interposed between the thermally conductive material and the first redistribution structure, the thermally conductive material extending through the second redistribution structure, and the thermally conductive material being electrically isolated.

Methods of manufacturing integrated fan-out packages with embedded heat dissipation structure

A package structure includes a die, an encapsulation layer, a redistribution layer structure and an adhesive material. The die includes a semiconductor substrate, conductive pads disposed over the semiconductor substrate and a passivation layer disposed over the semiconductor substrate and around the conductive pads. The encapsulation layer laterally encapsulates the die. the redistribution layer structure is disposed on the die and the encapsulation layer, and includes at least one redistribution layer embedded in at least one polymer layer, and the polymer layer contacts a portion of the passivation layer. The adhesive material is disposed on the die and covers an interface between the polymer layer and the passivation layer.

Package structure and method of forming the same

A method includes placing a first package component over a vacuum boat, wherein the vacuum boat comprises a hole, and wherein the first package component covers the hole. A second package component is placed over the first package component, wherein solder regions are disposed between the first and the second package components. The hole is vacuumed, wherein the first package component is pressed by a pressure against the vacuum boat, and wherein the pressure is generated by a vacuum in the hole. When the vacuum in the hole is maintained, the solder regions are reflowed to bond the second package component to the first package component.

Warpage control in the packaging of integrated circuits

A package structure and a method of forming the same are provided. The package structure includes a die, an encapsulant, a redistribution layer (RDL) structure, a passive device, and a plurality of dummy items. The encapsulant laterally encapsulates the die. The RDL structure is disposed on the die and the encapsulant. The passive device is disposed on and electrically bonded to the RDL structure. The plurality of dummy items are disposed on the RDL structure and laterally aside the passive device, wherein top surfaces of the plurality of dummy items are higher than a top surface of the passive device.

A manufacturing method of a package-on-package structure includes at least the following steps. Top packages are mounted on a top side of a reconstructed wafer over a flexible tape, where conductive bumps at a bottom side of the reconstructed wafer is attached to the flexible tape, and during the mounting, a shape geometry of the respective conductive bump changes and at least a lower portion of the respective conductive bump is embraced by the flexible tape. The flexible tape is released from the conductive bumps after the mounting.

Manufacturing method of package on package structure

Iintegrated fan-out packages with embedded heat dissipation structure

In an embodiment, a package structure including an electro-optical circuit board, a fanout package disposed over the electro-optical circuit board is provided. The electro-optical circuit board includes an optical waveguide. The fanout package includes a first optical input/output portion, a second optical input/output portion and a plurality of electrical input/output terminals electrically connected to the electro-optical circuit board. The first optical input/output portion is optically coupled to the second optical input/output portion through the optical waveguide of the electro-optical circuit board.

Package structure

A manufacturing method of a package-on-package structure includes at least the following steps. A plurality of conductive bumps of a first package is attached to a tape carrier. A second package is coupled to the first package opposite to the plurality of conductive bumps. When coupling the second package, the plurality of conductive bumps are deformed to form a plurality of deformed conductive bumps, and a contact area between the tape carrier and the respective deformed conductive bump increases.

A system and method for packaging semiconductor dies is provided. An embodiment comprises a first package with a first contact and a second contact. A post-contact material is formed on the first contact in order to adjust the height of a joint between the contact pad a conductive bump. In another embodiment a conductive pillar is utilized to control the height of the joint between the contact pad and external connections.

Semiconductor packaging structure and method

Integrated fan-out packages with embedded heat dissipation structure

A method of forming a package structure includes the following processes. A die is attached to a polymer layer. An encapsulant is formed over the polymer layer to encapsulate sidewalls of the die. A RDL structure is formed on the encapsulant and the die. A conductive terminal is electrically connected to the die through the RDL structure. A light transmitting film is formed on the polymer layer. An alignment process is performed, and the alignment process uses an optical equipment to see through the light transmitting film to capture the alignment information included in the polymer layer. A singulating process is performed to singulate the package structure according to the alignment information.

Method of singulate a package structure using a light transmitting film on a polymer layer

A semiconductor package structure comprises a substrate, a die bonded to the substrate, and one or more stud bump structures connecting the die to the substrate, wherein each of the stud bump structures having a stud bump and a solder ball encapsulating the stud bump to enhance thermal dissipation and reduce high stress concentrations in the semiconductor package structure.

Stud bump structure for semiconductor package assemblies

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Taichung, Taiwan

Cheng-Ting Chen