Micron Technology Incorporated

Other

Micron Semiconductor, Inc.

Chender Huang

Alan G Wood

Larry Duane Kinsman

Tim J Corbett

Gary L Chadwick

Walter L Moden

Jerry Michael Brooks

Jerrold L King

Rich Fogal

Mike Ball

A reusable burn-in/test fixture for discrete TAB die consists of two halves. The first half of the test fixture contains cavity in which die is inserted. When the two halves are assembled, the fixture establishes electrical contact with the die and with a burn-in oven. The test fixture need not be opened until the burn-in and electrical test are completed. The fixture permits the die to be characterized prior to assembly.

Method for burn-in testing semiconductor dice

Discrete die burn-in for nonpackaged die

A method and apparatus for wire bonding bond pads formed on semiconductor dice to the lead fingers of a semiconductor leadframe are provided. Using an automated wire bonding apparatus two (or more) adjacent dice attached to the leadframe are wire bonded using a single indexing step for the leadframe. The wire bonding apparatus includes a heat block for heating the two adjacent dice, and a clamp for clamping the two adjacent dice to the heat block for wire bonding. A bonding tool of the wire bonding apparatus is moved to successively wire bond the two adjacent dice. The method of the invention is suitable for DIP, ZIP, SOJ, TSOP, PLCC, SOIC, PQFP, or IDF semiconductor packages.

Method and apparatus for wire bonding semiconductor dice to a leadframe

A reusable burn-in/test fixture for discrete die consists of two halves. The first half of the test fixture contains cavity in which die is inserted. When the two halves are assembled, the fixture establishes electrical contact with the die and with a burn-in oven. The test fixture need not be opened until the burn-in and electrical test are completed. The fixture permits the die to be characterized prior to assembly.

Discrete die burn-in for non-packaged die

This invention creates a high speed semiconductor interconnect system which contains a plurality of signal traces, each in a flexible printed circuit, and each adhesively sandwiched between or adjacent to a flexible ground circuit and a flexible power circuit. The signal, power and ground circuits are stacked in multilayers and are connected to respective lead fingers and respective die circuits by standard, known methods such as TAB or wire bond and encapsulated in a known way. The ground plane and power plane being adjacent to the signal plane reduces the power-ground loop inductance and thus reduces the package noise. By reducing the inductance, the circuit can have a shorter switching time. Also, by adding the ground plane, the power-ground capacitance is increased, which serves to reduce the effect of power supply fluctuations in the system.

Method for producing high speed integrated circuits

A new and improved integrated circuit lead frame to be used to reduce bowing during the assembly of conventional microcircuits is described, wherein a conventional die attach paddle is supported on one side by at least one tie bar, extending conventionally between the paddle and the lead finger support structure also known as dam bars, and supported on the opposing side by a plurality of tie bars which are attached on their opposing ends to a novel support beam. This support beam extends between opposing side of the lead frame and provides independent support for the tie bars on the one side and permits dimensional and angular symmetry, similarity and parity to be achieved in the location of all of the tie bars in order to optimize the stability and integrity of the die pad and reduce bowing after the encapsulation process.

Growing community of inventors

Boise, ID, United States of America

Chender Huang