Taiwan Semiconductor Manufacturing Comp. Ltd.

Chen-Yu Chang

Wei-Kay Chiu

Wen-Yao Chen

Yuh-Fong Hwang

Chiech-Yi Kuo

Yi-Chuan Lo

Horng-Wen Chen

Shui-Tien Lin

Jimmy Hu

A method for controlling mask fabrication is provided, wherein the method uses statistical process control analysis. A manufacturing model is defined. A process run of a mask is performed as defined by the manufacturing model. A fault detection analysis is performed to reduce a bias in the manufacturing model. A fine-tuning signal is generated in response to a result of the fault detection analysis. The process run operation is adjusted according to the fine-tuning signal.

Method and system for mask fabrication process control

A mask fabrication system. The mask fabrication system contains a processing tool, a metrology tool, and a controller. The processing tool processes a mask. The metrology tool inspects the mask to obtain an inspection result. The controller generates a manufacturing model of the processing tool and calibrates the manufacturing model according to a device data, a material data, and the inspection result of the mask.

In this invention a coating of unexposed photoresist is used to protect from semiconductor processing the area immediately above a zero layer alignment mark used for a wafer stepper alignment. The entire surface of a wafer is coated with photoresist and all shot sites on the surface of a wafer including those containing the zero layer alignment marks are exposed with circuit patterns. Before the exposed areas of photoresist are removed, a protective coating of unexposed photoresist is applied to the surface of the wafer immediately above the alignment marks but within the boundaries of the shot site. The wafer is processed in the areas outside of the protective coating of photoresist including the shot site containing alignment marks. The area under the protective coating is not processed. This maintains a clear and concise view of the alignment marks. The area beyond the protective coating is processed along with the other shot sites. This produces a homogeneous wafer structure at the peripheral of the shot site containing the alignment marks. Yield in the shot sites surrounding the alignment sites is improved, and alignment errors are reduced as a result of not processing over the alignment marks.

Wafer alignment marks protected by photoresist

An advanced process control method using time interval between lots of a particular product to control the weighting of feedback data is described. A plurality of products are fabricated wherein the products are tracked by the process control method based on product type, for example. Variation in a parameter is detected. The adjustment speed of a process recipe is determined based on a time interval weighting wherein the time interval is defined as the time between processing of lots of the same product type. The process recipe is updated at the determined adjustment speed to decrease variation of the parameter.

Method of using time interval in IC foundry to control feed back system

A method that teaches the formation of deep trenches within the surface of a semiconductor wafer, these deep trenches are used to separate the wafer into individual chips by applying stress to the wafer. The formation of the deep trenches uses exposing a thick layer of photoresist followed by etching. The etching is a two step etch, a stabilization etch and a main etch. The stress used to separate the wafer into individual chips can be invoked by applying physical force to the wafer.

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Taichung, Taiwan

Chen-Yu Chang