Siliconware Precision Industries Co., Ltd.

Chen-Hsu Hsiao

Chien-Ping Huang

Tzong-Da Ho

A fabricating method for a semiconductor package is proposed, in which a chip carrier accommodates at least one semiconductor chip, which is attached with an interface layer formed on a covering module plate consisting of at least one covering plate, while the interface layer is poor in adhesion to the chip and a molding compound used for forming an encapsulant. So that after completing molding, ball implantation and singulation processes, the interface layer, the covering plate and a portion of the encapsulant formed on the covering plate can be easily removed by heating the singulated semiconductor package. This allows the molding compound not to flash on the chip, and prevents the chip from being damaged by stress generated in the molding process.

Substrate of semiconductor package

A substrate of a semiconductor package is proposed, which is formed with a strip copper layer on a core layer of the substrate, wherein a solder mask is arranged to cover the core layer and two lengthwise sides of the copper layer by a width between 0.1 mm to 1.0 mm, while a surface between the sides of the copper layer is exposed by forming a groove opening to the atmosphere and plated with gold. This makes bulges generated by shrinkage of the solder mask covering the sides of the copper layer extend outwardly in a direction away from the groove opening, allowing clamping force to be sufficiently exerted on the substrate by a mold during an encapsulation process. As such, after completing the encapsulation process, an encapsulating resin remained in the runner can be easily removed without damaging the substrate, and also resin flash can be prevented from occurrence.

Growing community of inventors

Nantou, Taiwan

Chen-Hsu Hsiao