Intel Corporation

Chee Hoo Lee

Chee Wai Wong

Jianggi He

Udy A Shrivastava

Integrate circuit die terminal arrangements and configurations for mounting an integrate circuit die on a package substrate to reduce package transmission paths. In one embodiment, terminals for signals sensitive to trace length outside a die are arranged at the corners of the die. The die is mounted on a package substrate in an angle with respect to a package substrate to point the corners of the die at the edges of the package substrate to reduce trace length outside the die. The center of the die may or may not coincide with the center of the substrate. In one embodiment, when compare to a centered, non-rotated die mounting position, mounting a die with corners pointing at the edges of the package substrate does not cause significant differences in substrate warpage.

Integrated circuit die configuration for packaging

According to embodiments of the present invention, a balun is disposed on a package that is to receive a die. In embodiments, the balun includes a first metal trace disposed on a first base and a second metal trace disposed on a second base. In embodiments, the first metal trace is one-quarter wavelength of an operating wavelength for a radio frequency (RF) signal and the second metal trace is three-quarters wavelength of the wavelength.

Growing community of inventors

Perak, Malaysia

Chee Hoo Lee