Taiwan Semiconductor Manufacturing Comp. Ltd.

Che-Rong Liang

Fei-Gwo Tsai

Feng-Lung Lin

Kuan Liang Wu

Kuan-Liang Wu

Feng Lung Lin

A hybrid mask set for exposing a plurality of layers on a semiconductor substrate to create an integrated circuit device is disclosed. The hybrid mask set includes a first group of one or more multi-layer masks (MLMs) for a first subset of the plurality of layers. Each MLM includes a plurality of different images for different layers, the images being separated by a relatively wide image spacer. The hybrid mask set also includes a first group of one or more production-ready masks for a second subset of the plurality of layers. Each production-ready mask includes a plurality of similar images for a common layer, each image being separated by a relatively narrow scribe street.

Hybrid multi-layer mask

A method of fabricating a mask set is provided. The method includes providing mask data associated with a plurality of mask layers. The mask data includes a first pattern associated with a first technology node and a second pattern associated with a second technology node. The method continues with determining to form a multi-technology node mask (MTM) for a first mask layer of the plurality of mask layers. The MTM for the first mask layer is formed, which includes features associated with the first pattern and features associated with the second pattern.

Multiple technology node mask

A multiple technology node mask (MTM) is provided. An MTM includes a pattern associated with a first technology node and a pattern associated with a second technology node. The first technology node and the second technology node may be different. For example, the first technology node may be a main node and the second technology node a sub-node. A mask set including an MTM may also include single technology node masks (STMs) for mask layers in which the first technology node and second technology node and/or the patterns associated with each are not compatible. A single mask set including MTM and STMs, may be used to produce a plurality of devices, each on a different wafer.

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Taipei, Taiwan

Che-Rong Liang