Eastman-Kodak Company

International Business Machines Corporation

Omnivision Technologies, Inc.

USA as Represented by Secretary of the Navy

Charles V Stancampiano

Edward T Nelson

John J Ellis-Monaghan

James William Adkisson

Mark David Jaffe

Richard John Rassel

James P Lavine

R Michael Guidash

Robert Michael Guidash

Constantine N Anagnostopoulos

Eric Gordon Stevens

David N Nichols

David Michael Boisvert

Ram Kannegundla

R Daniel McGrath

Sidney Shapiro

A CMOS active pixel sensor (APS) cell structure having dual workfunction transfer gate device and method of fabrication. The transfer gate device comprises a dielectric layer formed on a substrate and a dual workfunction gate conductor layer formed on the dielectric layer comprising a first conductivity type doped region and an abutting second conductivity type doped region. The transfer gate device defines a channel region where charge accumulated by a photosensing device is transferred to a diffusion region. A silicide structure is formed atop the dual workfunction gate conductor layer for electrically coupling the first and second conductivity type doped regions. In one embodiment, the silicide contact is smaller in area dimension than an area dimension of said dual workfunction gate conductor layer. Presence of the silicide strap prevents the diodic behavior from allowing one or the other side of the gate to float to an indeterminate voltage.

Methods of forming silicide strapping in imager transfer gate device

A method for lowering dark current in an image sensor pixel, the method includes the steps of providing a photosensitive area for receiving incident light which is converted into a charge; providing a gate for transferring charge from the photosensitive area; wherein the gate is held at a voltage which will accumulate majority carriers at a semiconductor-dielectric interface during integration for the photosensitive area. Alternatively, a potential profile can be provided under the gate to drain the dark current away from the photogeneration diffusion.

Camera, image sensor, and method for decreasing undesirable dark current

Silicide strapping in imager transfer gate device

A charge-coupled device (CCD) image sensor that preserves defect gettering characteristics having a vertical overflow drain (VOD) for blooming protection is provided in a structure that provides low voltage electronic shuttering. This structure reduces the electronic shutter voltage to ease the demands on off-chip support circuitry required to operate the CCD image sensor. The invention provides an improved pixel structure to reduce this voltage. Prior art difficulties are avoided by providing uniform, n-type layers of varying doping levels underneath the entire area of the CCD device. Combined with a lightly doped n-type substrate these layers provide low voltage electronic shutter operation.

CCD image sensor

A method and apparatus for generating timing signals within the sensor in an imaging system by making provisions internally within a sensor that allows the sensor to generate the timing signals which are then output to the system to control the image sensor timing This alleviates the system from the responsibility of counting pixels and lines. The sensor will give at predetermined times, outputs which have the same wave form as the normal video output but with a much higher amplitude than the maximum video output recognized by the image processing system. These output signals will identify the end of the line and likewise will identify the end of the frame (or field). The resulting sensor can maintain its own timing sequence accurately tracking the time for lines and frame readout.

Image sensor with oversized vertical shift registers for marker pixel

There is disclosed an electronic imaging system employing a high efficiency CCD imaging unit and a plurality of unique analog signal processors (ASP's). The ASP's operate in unison for receiving a first color sequence, such as cyan (C), yellow (Y), and green (G), of color-component pixel image signals from the CCD unit and for providing respective output image signals of a second sequence of color components such as blue (B), red (R), and green (G), having proper white balance for combining into a high definition full color image. The dark background or zero level of the output image signals is referenced to a common 'dark' reference voltage to minimize dark background variations in the combined color image. Each ASP is substantially identical and has a unique architecture which facilitates its implementation as an integrated circuit. The ASP has a dynamic range of substantially better than 8-bits and provides for a wide range of signal sample rates (e.g., 1 to 40 MHz). By employing masks of certain colors such as C, Y and G in the CCD unit itself higher efficiency and lower noise is obtained than by using colors such as R, G, and B.

Electronic color imaging system and analog signal processor therefor

A virtual phase CCD is fabricated in a semiconductor substrate of n-type conductivity having a layer of silicon dioxide on a surface by first forming a channel region by the implantation of boron ions. Masking regions of polycrystalline silicon are then formed on the silicon dioxide over and spaced along the channel region. Boron ions are then implanted into the substrate between the masking regions. The size of the masking regions are then increased by the addition of portions of a first photoresist layer to decrease the spacing along the channel region between the masking regions. Arsenic ions are then implanted into the channel region between the masking regions to form virtual gate regions along the surface of the channel reigon. Boron ions are then implanted into the substrate between the masking regions. The size of the masking regions is then further increased by the addition of a second photoresist layer to further decrease the spacing between the masking regions along the channel region. Boron ions are then implanted into the substrate between the masking regions. The masking regions and the silicon dioxide layer are removed and conductive gates are formed over and insulated from the substrate surface between the virtual gate regions.

Method of making a virtual phase CCD

Various injection locking arrangements employing Josephson oscillators are disclosed for achieving signal amplification, frequency conversion and the detection of extremely low level signals at high frequency ranges.

Injection locked Josephson oscillator systems

Growing community of inventors

Rochester, NY, United States of America

Charles V Stancampiano