Advanced Chip Engineering Technology, Inc.

Chao-Nan Chou

Wen-Kun Yang

Chih-Wei Lin

Wen-Bin Sun

Jui-Hsien Chang

Shih-Li Chen

Chin-Chen Yang

Tung-Chuan Wang

Chun-Hui Yu

His-Ying Yuan

Wen-Ping Yang

Ching-Shun Huang

Ming-Hui Lin

The present invention provides a structure of package comprising a substrate with a pre-formed die receiving cavity formed and/or terminal contact metal pads formed within an upper surface of the substrate. A die is disposed within the die receiving cavity by adhesion and a dielectric layer formed on the die and the substrate. At least one re-distribution built up layer (RDL) is formed on the dielectric layer and coupled to the die via contact pad. Connecting structure, for example, UBM is formed over the re-distribution built up layer. Terminal Conductive bumps are coupled to the UBM.

Wafer level package with good CTE performance

An image sensor die comprises a substrate and an image sensor array formed over the substrate. Micro lens are disposed on the image sensor array. A protection layer is formed on the micro lens to prevent the micro lens from particle containment.

Image sensor with a protection layer

The present invention provides a structure of elastic dielectric layers with certain through holes adjacent to the angle of a RDL of WLP to absorb the stress. The elastic dielectric layer is made from silicone based materials with specific range of CTE, elongation rate and hardness, which can improve the mechanical reliability of the structure during temperature cycling test. The CTE difference between the RDL and the elastic dielectric material still may cause the elastic dielectric layer crack; to solve this problem, The present invention further provides a structure of dielectric layers with certain open through holes adjacent to the curve portion of a RDL of WLP which can reduce the stress accumulated at area of the dielectric layer adjacent to the RDL/dielectric layer interface to solve the crack problem of the dielectric layer.

Structure of dielectric layers in built-up layers of wafer level package

A package structure including a device, an interconnecting element, a pad and a protecting element is provided. The device connects with a first end of the interconnecting element through the pad. The protecting element covers the pad and the first end of the interconnecting element.

Package structure

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Taipei, Taiwan

Chao-Nan Chou