Siliconware Precision Industries Co., Ltd.

Chao-Dung Suo

Shih-Kuang Chiu

Feng-Lung Chien

Kuo-Liang Mao

Ying-Chou Tsai

Ke-Chuan Yang

Jui-Meng Jao

Ying Chou Tsai

Yi-Hsin Chen

Chih-Shun Chen

A semiconductor device and a fabrication method thereof are proposed. A first dielectric layer is formed on a semiconductor substrate having at least one bond pad, wherein the first dielectric layer has a first opening for exposing the bond pad and a second opening at a predetermined position for redistribution. A first metallic layer is applied on the first dielectric layer and in the first and second openings. A second metallic layer and a third metallic layer are formed on the first metallic layer at positions corresponding to the first and second openings, respectively. A second dielectric layer and a solder bump are formed on the second and third metallic layers, respectively. The second metallic layer can assure electrical quality of the first metallic layer corresponding to the first opening without having an electrical break of the first metallic layer for redistribution.

Semiconductor device and fabrication method thereof

A flip-chip bonding structure on substrate for flip-chip package application is proposed, on which solder bumps can be bonded for electrically coupling a flip chip to the substrate. The proposed flip-chip bonding structure is characterized in that its solder-bump pads can be dimensionally-invariable irrespective of a positional deviation in solder mask due to misalignment. Moreover, the proposed flip-chip bonding structure can help allow each attached solder bump to be reduced in horizontal extent as compared to the prior art, so that neighboring solder bumps would be less likely short-circuited to each other and flip-chip underfill can be more easily implemented.

Flip-chip bonding structure on substrate for flip-chip package application

A bump structure formed having dopants therein. The bump structure includes a substrate, a plurality of bonding pads, a die and a plurality of bumps. The substrate has a first surface. The plurality of bonding pads is formed on the first surface of the substrate. The die has an active surface. Each bump at least includes a base and a plurality of dopants. The bumps are formed on the active surface of the die. The active surface of the die faces the first surface of the substrate. The substrate and the die are aligned such that each bump on the die corresponds with a bonding pad on the substrate. Dopants in the bump structure are made to contact the bonding pads on the substrate.

Bump structure with dopants

A solder-pump fabrication method is proposed, which is used for the fabrication of solder bumps with high coplanarity over a semiconductor chip for flip-chip application. The proposed solder-bump fabrication method is characterized in the use of a two-step solder-bump fabrication process, including a first step of electroplating solder over UBM (Under Bump Metallization) pads to a controlled height still below the topmost surface of the mask, and a second step of screen-printing solder paste over the electroplated solder layer. The combined structure of the electroplated solder layer and the printed solder layer is then reflowed to form the desired solder bump. Since the proposed solder-bump fabrication method allows the solder material electroplated and printed over the UBM pads to be confined within the mask openings and never exceed the topmost surface of the mask, the resulted solder bumps would not be bridged to neighboring ones. Moreover, the proposed solder-bump fabrication method allows all the resulted solder bumps to be substantially equally sized to achieve high coplanarity.

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Taichung, Taiwan

Chao-Dung Suo